📄 bitgen.xmsgs
字号:
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_13</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_05</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_14</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_06</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_15</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_07</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_08</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_DATA_09</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/IODELAY_RX_CNTL</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_00</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_01</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_10</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_02</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_11</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_03</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_12</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_04</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_13</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_05</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_14</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_06</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_15</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_07</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_08</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_DATA_09</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1325" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_RX_CNTL</arg>>:<<arg fmt="%s" index="2">ISERDES_ISERDES</arg>>. Useless CE2 input pin. With NUM_CE set 1 the CE2 input pin is being ignored.
</msg>
<msg type="warning" file="PhysDesignRules" num="1412" delta="unknown" >Dangling pins on block:<<arg fmt="%s" index="1">u_lvds/uut_rx/ISERDES_CLOCK_RX</arg>>:<<arg fmt="%s" index="2">IODELAY_IODELAY</arg>>. When DELAY_SRC is not DATAIN programming the DATAIN input pin is not used and will be ignored.
</msg>
</messages>
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -