myfx2.fit.eqn

用于USB20芯片CY7C68013和FPGA之间的通信

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-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--A1L881Q is RDY[1]~reg0 at LC_X3_Y15_N5
--operation mode is normal

A1L881Q_lut_out = GND;
A1L881Q = DFFEAS(A1L881Q_lut_out, CLK_8, GLOBAL(KEY[0]), , , STATE.WRITE_1, , , VCC);


--STATE.WRITE_1 is STATE.WRITE_1 at LC_X3_Y15_N2
--operation mode is normal

STATE.WRITE_1_lut_out = A1L881Q # !STATE.IDLE;
STATE.WRITE_1 = DFFEAS(STATE.WRITE_1_lut_out, CLK_8, GLOBAL(KEY[0]), , , , , , );


--CLK_8 is CLK_8 at LC_X3_Y15_N6
--operation mode is normal

CLK_8_lut_out = !CLK_8;
CLK_8 = DFFEAS(CLK_8_lut_out, CLK_4, VCC, , , , , , );


--STATE.IDLE is STATE.IDLE at LC_X3_Y15_N4
--operation mode is normal

STATE.IDLE_lut_out = VCC;
STATE.IDLE = DFFEAS(STATE.IDLE_lut_out, CLK_8, GLOBAL(KEY[0]), , , , , , );


--CLK_4 is CLK_4 at LC_X3_Y14_N4
--operation mode is normal

CLK_4_lut_out = !CLK_4;
CLK_4 = DFFEAS(CLK_4_lut_out, CLK_2, VCC, , , , , , );


--DREG[0] is DREG[0] at LC_X2_Y15_N2
--operation mode is arithmetic

DREG[0]_lut_out = !DREG[0];
DREG[0] = DFFEAS(DREG[0]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L41 is DREG[0]~129 at LC_X2_Y15_N2
--operation mode is arithmetic

A1L41_cout_0 = DREG[0];
A1L41 = CARRY(A1L41_cout_0);

--A1L51 is DREG[0]~129COUT1_193 at LC_X2_Y15_N2
--operation mode is arithmetic

A1L51_cout_1 = DREG[0];
A1L51 = CARRY(A1L51_cout_1);


--DREG[1] is DREG[1] at LC_X2_Y15_N3
--operation mode is arithmetic

DREG[1]_lut_out = DREG[1] $ A1L41;
DREG[1] = DFFEAS(DREG[1]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L71 is DREG[1]~133 at LC_X2_Y15_N3
--operation mode is arithmetic

A1L71_cout_0 = !A1L41 # !DREG[1];
A1L71 = CARRY(A1L71_cout_0);

--A1L81 is DREG[1]~133COUT1_194 at LC_X2_Y15_N3
--operation mode is arithmetic

A1L81_cout_1 = !A1L51 # !DREG[1];
A1L81 = CARRY(A1L81_cout_1);


--DREG[2] is DREG[2] at LC_X2_Y15_N4
--operation mode is arithmetic

DREG[2]_lut_out = DREG[2] $ !A1L71;
DREG[2] = DFFEAS(DREG[2]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L02 is DREG[2]~137 at LC_X2_Y15_N4
--operation mode is arithmetic

A1L02 = CARRY(DREG[2] & !A1L81);


--DREG[3] is DREG[3] at LC_X2_Y15_N5
--operation mode is arithmetic

DREG[3]_carry_eqn = A1L02;
DREG[3]_lut_out = DREG[3] $ DREG[3]_carry_eqn;
DREG[3] = DFFEAS(DREG[3]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L22 is DREG[3]~141 at LC_X2_Y15_N5
--operation mode is arithmetic

A1L22_cout_0 = !A1L02 # !DREG[3];
A1L22 = CARRY(A1L22_cout_0);

--A1L32 is DREG[3]~141COUT1_195 at LC_X2_Y15_N5
--operation mode is arithmetic

A1L32_cout_1 = !A1L02 # !DREG[3];
A1L32 = CARRY(A1L32_cout_1);


--DREG[4] is DREG[4] at LC_X2_Y15_N6
--operation mode is arithmetic

DREG[4]_carry_eqn = (!A1L02 & A1L22) # (A1L02 & A1L32);
DREG[4]_lut_out = DREG[4] $ (!DREG[4]_carry_eqn);
DREG[4] = DFFEAS(DREG[4]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L52 is DREG[4]~145 at LC_X2_Y15_N6
--operation mode is arithmetic

A1L52_cout_0 = DREG[4] & (!A1L22);
A1L52 = CARRY(A1L52_cout_0);

--A1L62 is DREG[4]~145COUT1_196 at LC_X2_Y15_N6
--operation mode is arithmetic

A1L62_cout_1 = DREG[4] & (!A1L32);
A1L62 = CARRY(A1L62_cout_1);


--DREG[5] is DREG[5] at LC_X2_Y15_N7
--operation mode is arithmetic

DREG[5]_carry_eqn = (!A1L02 & A1L52) # (A1L02 & A1L62);
DREG[5]_lut_out = DREG[5] $ (DREG[5]_carry_eqn);
DREG[5] = DFFEAS(DREG[5]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L82 is DREG[5]~149 at LC_X2_Y15_N7
--operation mode is arithmetic

A1L82_cout_0 = !A1L52 # !DREG[5];
A1L82 = CARRY(A1L82_cout_0);

--A1L92 is DREG[5]~149COUT1_197 at LC_X2_Y15_N7
--operation mode is arithmetic

A1L92_cout_1 = !A1L62 # !DREG[5];
A1L92 = CARRY(A1L92_cout_1);


--DREG[6] is DREG[6] at LC_X2_Y15_N8
--operation mode is arithmetic

DREG[6]_carry_eqn = (!A1L02 & A1L82) # (A1L02 & A1L92);
DREG[6]_lut_out = DREG[6] $ !DREG[6]_carry_eqn;
DREG[6] = DFFEAS(DREG[6]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L13 is DREG[6]~153 at LC_X2_Y15_N8
--operation mode is arithmetic

A1L13_cout_0 = DREG[6] & !A1L82;
A1L13 = CARRY(A1L13_cout_0);

--A1L23 is DREG[6]~153COUT1_198 at LC_X2_Y15_N8
--operation mode is arithmetic

A1L23_cout_1 = DREG[6] & !A1L92;
A1L23 = CARRY(A1L23_cout_1);


--DREG[7] is DREG[7] at LC_X2_Y15_N9
--operation mode is arithmetic

DREG[7]_carry_eqn = (!A1L02 & A1L13) # (A1L02 & A1L23);
DREG[7]_lut_out = DREG[7] $ (DREG[7]_carry_eqn);
DREG[7] = DFFEAS(DREG[7]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L43 is DREG[7]~157 at LC_X2_Y15_N9
--operation mode is arithmetic

A1L43 = CARRY(!A1L23 # !DREG[7]);


--DREG[8] is DREG[8] at LC_X2_Y14_N0
--operation mode is arithmetic

DREG[8]_carry_eqn = A1L43;
DREG[8]_lut_out = DREG[8] $ !DREG[8]_carry_eqn;
DREG[8] = DFFEAS(DREG[8]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L63 is DREG[8]~161 at LC_X2_Y14_N0
--operation mode is arithmetic

A1L63_cout_0 = DREG[8] & !A1L43;
A1L63 = CARRY(A1L63_cout_0);

--A1L73 is DREG[8]~161COUT1_199 at LC_X2_Y14_N0
--operation mode is arithmetic

A1L73_cout_1 = DREG[8] & !A1L43;
A1L73 = CARRY(A1L73_cout_1);


--DREG[9] is DREG[9] at LC_X2_Y14_N1
--operation mode is arithmetic

DREG[9]_carry_eqn = (!A1L43 & A1L63) # (A1L43 & A1L73);
DREG[9]_lut_out = DREG[9] $ (DREG[9]_carry_eqn);
DREG[9] = DFFEAS(DREG[9]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L93 is DREG[9]~165 at LC_X2_Y14_N1
--operation mode is arithmetic

A1L93_cout_0 = !A1L63 # !DREG[9];
A1L93 = CARRY(A1L93_cout_0);

--A1L04 is DREG[9]~165COUT1_200 at LC_X2_Y14_N1
--operation mode is arithmetic

A1L04_cout_1 = !A1L73 # !DREG[9];
A1L04 = CARRY(A1L04_cout_1);


--DREG[10] is DREG[10] at LC_X2_Y14_N2
--operation mode is arithmetic

DREG[10]_carry_eqn = (!A1L43 & A1L93) # (A1L43 & A1L04);
DREG[10]_lut_out = DREG[10] $ (!DREG[10]_carry_eqn);
DREG[10] = DFFEAS(DREG[10]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L24 is DREG[10]~169 at LC_X2_Y14_N2
--operation mode is arithmetic

A1L24_cout_0 = DREG[10] & (!A1L93);
A1L24 = CARRY(A1L24_cout_0);

--A1L34 is DREG[10]~169COUT1_201 at LC_X2_Y14_N2
--operation mode is arithmetic

A1L34_cout_1 = DREG[10] & (!A1L04);
A1L34 = CARRY(A1L34_cout_1);


--DREG[11] is DREG[11] at LC_X2_Y14_N3
--operation mode is arithmetic

DREG[11]_carry_eqn = (!A1L43 & A1L24) # (A1L43 & A1L34);
DREG[11]_lut_out = DREG[11] $ DREG[11]_carry_eqn;
DREG[11] = DFFEAS(DREG[11]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L54 is DREG[11]~173 at LC_X2_Y14_N3
--operation mode is arithmetic

A1L54_cout_0 = !A1L24 # !DREG[11];
A1L54 = CARRY(A1L54_cout_0);

--A1L64 is DREG[11]~173COUT1_202 at LC_X2_Y14_N3
--operation mode is arithmetic

A1L64_cout_1 = !A1L34 # !DREG[11];
A1L64 = CARRY(A1L64_cout_1);


--DREG[12] is DREG[12] at LC_X2_Y14_N4
--operation mode is arithmetic

DREG[12]_carry_eqn = (!A1L43 & A1L54) # (A1L43 & A1L64);
DREG[12]_lut_out = DREG[12] $ !DREG[12]_carry_eqn;
DREG[12] = DFFEAS(DREG[12]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L84 is DREG[12]~177 at LC_X2_Y14_N4
--operation mode is arithmetic

A1L84 = CARRY(DREG[12] & !A1L64);


--DREG[13] is DREG[13] at LC_X2_Y14_N5
--operation mode is arithmetic

DREG[13]_carry_eqn = A1L84;
DREG[13]_lut_out = DREG[13] $ DREG[13]_carry_eqn;
DREG[13] = DFFEAS(DREG[13]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L05 is DREG[13]~181 at LC_X2_Y14_N5
--operation mode is arithmetic

A1L05_cout_0 = !A1L84 # !DREG[13];
A1L05 = CARRY(A1L05_cout_0);

--A1L15 is DREG[13]~181COUT1_203 at LC_X2_Y14_N5
--operation mode is arithmetic

A1L15_cout_1 = !A1L84 # !DREG[13];
A1L15 = CARRY(A1L15_cout_1);


--DREG[14] is DREG[14] at LC_X2_Y14_N6
--operation mode is arithmetic

DREG[14]_carry_eqn = (!A1L84 & A1L05) # (A1L84 & A1L15);
DREG[14]_lut_out = DREG[14] $ (!DREG[14]_carry_eqn);
DREG[14] = DFFEAS(DREG[14]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );

--A1L35 is DREG[14]~185 at LC_X2_Y14_N6
--operation mode is arithmetic

A1L35_cout_0 = DREG[14] & (!A1L05);
A1L35 = CARRY(A1L35_cout_0);

--A1L45 is DREG[14]~185COUT1_204 at LC_X2_Y14_N6
--operation mode is arithmetic

A1L45_cout_1 = DREG[14] & (!A1L15);
A1L45 = CARRY(A1L45_cout_1);


--DREG[15] is DREG[15] at LC_X2_Y14_N7
--operation mode is normal

DREG[15]_carry_eqn = (!A1L84 & A1L35) # (A1L84 & A1L45);
DREG[15]_lut_out = DREG[15] $ (DREG[15]_carry_eqn);
DREG[15] = DFFEAS(DREG[15]_lut_out, CLK_8, VCC, , STATE.WRITE_1, VCC, !GLOBAL(KEY[0]), , );


--CLK_2 is CLK_2 at LC_X3_Y14_N2
--operation mode is normal

CLK_2_lut_out = !CLK_2;
CLK_2 = DFFEAS(CLK_2_lut_out, MMCLK, VCC, , , , , , );


--nRESET is nRESET at PIN_29
--operation mode is input

nRESET = INPUT();


--GPA[0] is GPA[0] at PIN_54
--operation mode is input

GPA[0] = INPUT();


--GPA[1] is GPA[1] at PIN_53
--operation mode is input

GPA[1] = INPUT();


--GPA[2] is GPA[2] at PIN_50
--operation mode is input

GPA[2] = INPUT();


--GPA[3] is GPA[3] at PIN_49
--operation mode is input

GPA[3] = INPUT();


--GPA[4] is GPA[4] at PIN_48
--operation mode is input

GPA[4] = INPUT();


--GPA[5] is GPA[5] at PIN_47
--operation mode is input

GPA[5] = INPUT();


--GPA[6] is GPA[6] at PIN_46
--operation mode is input

GPA[6] = INPUT();


--GPA[7] is GPA[7] at PIN_45
--operation mode is input

GPA[7] = INPUT();


--GPA[8] is GPA[8] at PIN_5
--operation mode is input

GPA[8] = INPUT();


--CTL[0] is CTL[0] at PIN_57
--operation mode is input

CTL[0] = INPUT();


--CTL[1] is CTL[1] at PIN_56
--operation mode is input

CTL[1] = INPUT();


--CTL[2] is CTL[2] at PIN_55
--operation mode is input

CTL[2] = INPUT();


--CTL[3] is CTL[3] at PIN_59
--operation mode is input

CTL[3] = INPUT();


--CTL[4] is CTL[4] at PIN_58
--operation mode is input

CTL[4] = INPUT();


--CTL[5] is CTL[5] at PIN_20
--operation mode is input

CTL[5] = INPUT();


--USER[0] is USER[0] at PIN_13
--operation mode is input

USER[0] = INPUT();


--USER[1] is USER[1] at PIN_12
--operation mode is input

USER[1] = INPUT();


--USER[2] is USER[2] at PIN_14
--operation mode is input

USER[2] = INPUT();


--USER[3] is USER[3] at PIN_8
--operation mode is input

USER[3] = INPUT();


--USER[4] is USER[4] at PIN_7
--operation mode is input

USER[4] = INPUT();


--USER[5] is USER[5] at PIN_6
--operation mode is input

USER[5] = INPUT();


--IFCLK is IFCLK at PIN_11
--operation mode is input

IFCLK = INPUT();


--CLKOUT is CLKOUT at PIN_28
--operation mode is input

CLKOUT = INPUT();


--nINT5 is nINT5 at PIN_15
--operation mode is input

nINT5 = INPUT();


--KEY[1] is KEY[1] at PIN_122
--operation mode is input

KEY[1] = INPUT();


--KEY[2] is KEY[2] at PIN_121
--operation mode is input

KEY[2] = INPUT();


--KEY[0] is KEY[0] at PIN_123
--operation mode is input

KEY[0] = INPUT();


--MMCLK is MMCLK at PIN_153
--operation mode is input

MMCLK = INPUT();


--RDY[0] is RDY[0] at PIN_240
--operation mode is output

RDY[0] = OUTPUT(VCC);


--RDY[1] is RDY[1] at PIN_239
--operation mode is output

RDY[1] = OUTPUT(!A1L881Q);


--RDY[2] is RDY[2] at PIN_238
--operation mode is output

RDY[2] = OUTPUT(GND);


--RDY[3] is RDY[3] at PIN_237
--operation mode is output

RDY[3] = OUTPUT(GND);


--RDY[4] is RDY[4] at PIN_236
--operation mode is output

RDY[4] = OUTPUT(GND);


--RDY[5] is RDY[5] at PIN_235
--operation mode is output

RDY[5] = OUTPUT(GND);


--LED[0] is LED[0] at PIN_182
--operation mode is output

LED[0] = OUTPUT(VCC);


--LED[1] is LED[1] at PIN_181
--operation mode is output

LED[1] = OUTPUT(GND);


--LED[2] is LED[2] at PIN_180
--operation mode is output

LED[2] = OUTPUT(GND);


--LED[3] is LED[3] at PIN_179
--operation mode is output

LED[3] = OUTPUT(GND);


--RAMAA[0] is RAMAA[0] at PIN_183
--operation mode is output

RAMAA[0] = OUTPUT(GND);


--RAMAA[1] is RAMAA[1] at PIN_184
--operation mode is output

RAMAA[1] = OUTPUT(GND);


--RAMAA[2] is RAMAA[2] at PIN_185
--operation mode is output

RAMAA[2] = OUTPUT(GND);


--RAMAA[3] is RAMAA[3] at PIN_186
--operation mode is output

RAMAA[3] = OUTPUT(GND);


--RAMAA[4] is RAMAA[4] at PIN_187
--operation mode is output

RAMAA[4] = OUTPUT(GND);