correlate_and_accumulate_map.mrp

如何使用ISE和FPGA使用指南

INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:MapLib:797 - Your design is targeting LX/SX Production Step 0/1/ES devices.
   Please note that there are new specifications for the DCMs to guarantee
   maximum frequency performance. If the DCM input clock might stop or if the
   DCM reset might be asserted for an extended time, then use of the dcm_standby
   macro may be required. Please see Answer Record 21127.
INFO:LIT:244 - All of the single ended outputs in this design are using slew
   rate limited output drivers. The delay on speed critical single ended outputs
   can be dramatically reduced by designating them as fast outputs in the
   schematic.

Section 4 - Removed Logic Summary
---------------------------------
  30 block(s) optimized away
   5 signal(s) removed

Section 5 - Removed Logic
-------------------------

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).

The signal "chd_fifo_inst/pn_correlator_inst/wr_addr_srst" is sourceless and has
been removed.
The signal "chc_fifo_inst/pn_correlator_inst/wr_addr_srst" is sourceless and has
been removed.
The signal "rd_clk_core_inst/LOCKED_OUT" is sourceless and has been removed.
The signal "chb_fifo_inst/pn_correlator_inst/wr_addr_srst" is sourceless and has
been removed.
The signal "cha_fifo_inst/pn_correlator_inst/wr_addr_srst" is sourceless and has
been removed.

Optimized Block(s):
TYPE 		BLOCK
GND 		cha_fifo_inst/XST_GND
GND 		cha_fifo_inst/pn_correlator_inst/pn_correlation_fsm_inst/XST_GND
GND 		cha_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_GND
VCC 		cha_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_VCC
GND 		chb_fifo_inst/XST_GND
GND 		chb_fifo_inst/pn_correlator_inst/pn_correlation_fsm_inst/XST_GND
GND 		chb_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_GND
VCC 		chb_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_VCC
GND 		chc_fifo_inst/XST_GND
GND 		chc_fifo_inst/pn_correlator_inst/pn_correlation_fsm_inst/XST_GND
GND 		chc_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_GND
VCC 		chc_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_VCC
GND 		chd_fifo_inst/XST_GND
GND 		chd_fifo_inst/pn_correlator_inst/pn_correlation_fsm_inst/XST_GND
GND 		chd_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_GND
VCC 		chd_fifo_inst/pn_correlator_inst/pn_correlation_inst/XST_VCC
GND 		data_control_inst/data_control_fsm_inst/XST_GND
GND 		data_control_inst/mac_inst/mac_cha_inst/XST_GND