cs8900_enet_if_driver.h

sharp的arm920t 7A400的评估板附带光盘Sharp KEVLH7A400 v0.3b Welcome to the SHARP KEV7A400 Evaluation board

#define RX128IE        0x0800 // Interrupt on start of RX frame
#define TXCOLOVIE      0x1000 // Interrupt on TX collision cntr overflow
#define MISSOVIE       0x2000 // Interrupt on missed frame cntr overflow
#define RXDESTIE       0x8000 // Interrupt on match of RX frame to addr

// Register 13 - Line control bits
#define SERRXON        0x0040 // Receiver enabled
#define SERTXON        0x0090 // Transmitter enabled
#define AUIONLY        0x0100 // AUI/10Base-T selection bit
#define AUTOAUI        0x0200 // Autoselect AUI or 10Base-T
#define MODBACKOFFE    0x0800 // Used modified TX backoff alogrithm
#define POLARITYDIS    0x1000 // Do not automatically correct polarity
#define DIS2PARTDEF    0x2000 // Disable 2-part deferral
#define LORXSQUELCH    0x4000 // Reduce squelch thresholds

// Register 15 - Self control bits
#define RESET          0x0040 // Perform chip reset
#define SWSUSPEND      0x0100 // Enter suspend mode
#define HWSLEEPIE      0x0200 // Enter sleep mode
#define HWSTANDBYE     0x0400 // Standby/Sleep enable
#define HC0E           0x1000 // LINKLED led/HC0 output selection
#define HC1E           0x2000 // BSTATUS led/HC1 output selection
#define HCB0           0x4000 // State of HC0 pin
#define HCB1           0x8000 // State of HC1 pin

// Register 17 - Bus control bits
#define RESETRXDMA     0x0040 // Reset DMA RX offset pointer
#define DMAEXTEND      0x0100 // Modify DMA signal timing
#define USESA          0x0200 // Enable MEMCS16 on SA12..19 match
#define MEMORYE        0x0400 // Enable memory mode
#define DMABURST       0x0800 // Limit DMA transfers to bursts
#define IOCHRDYE       0x1000 // Disable IOCHRDY signal
#define RXDMASIZE      0x2000 // Set DMA buffer size to 64K
#define ENABLERQ       0x8000 // Enable interrupt generation

// Register 19 - Test control bits
#define DISABLELT      0x0080 // Ignore link status, allow all transfers
#define ENDECLOOP      0x0200 // Enable ENDEC loopback mode
#define AUILOOP        0x0400 // Enable AUI loopback mode
#define DISABLEBACKOFF 0x0800 // Disable backoff algorithm
#define FDX            0x4000 // Enable 10Base-T full duplex mode

/**********************************************************************
 * Register attributes and layout - Status registers
 *********************************************************************/

// Register 4 - Receiver event bits
#define IAHASH         0x0040 // Receive frame's DA was accepted
#define DRIBBLEBITS    0x0080 // Extra bits received after last byte
#define RXOK           0x0100 // RX frame has good length and CRC
#define HASHED         0x0200 // DA was accepted by the hash filter
#define INDIVID_ADDR   0x0400 // RX frame matched DA
#define BROADCAST      0x0800 // Broadcast RX frame received
#define CRCERROR       0x1000 // Bad CRC in the RX frame
#define RUNT           0x2000 // RX frame shorter than 64 bytes
#define EXTRADATA      0x4000 // RX frame longer than 1518 bytes
#define HASH_TBL_MASK  0xFC00 // Hash table index mask

// Register 8 - Transmit event bits
#define LOSSOFCRS      0x0040 // No carrier at end of preamble
#define SQERROR        0x0080 // No collision on AUI
#define TXOK           0x0100 // Last TX frame transmitted OK
#define OUTOFWINDOW    0x0200 // Late collision
#define JABBER         0x0400 // Last tranmission too long
#define TXCOL_MASK     0x7800 // Number of collisions on last packet
#define COLL16         0x8000 // Too many collisions on packet

// Register 9 - TX command status
#define TXSTART        0x00C0 // Buffer load prior to transfer (mask)
#define FORCE_TERM     0x0100 // Force term of any existing TX frames
#define ONECOLL        0x0200 // Stop transfer on any collision
#define INHIBITCRC     0x1000 // Do not append CRC to transmission
#define TXPADDIS       0x2000 // Disable TX frame passing

#define TX_START_5     0x0000 // Start transfer after 5 bytes in buffer
#define TX_START_381   0x0040 // Start transfer after 381 bytes in buf
#define TX_START_1021  0x0080 // Start transfer after 1021 bytes in buf
#define TX_START_ALL   0x00C0 // Start transfer after frame is buffered

// Register C - Buffer event status bits
#define SWINT          0x0040 // Software initiated interrupt
#define RXDMAFRAME     0x0080 // One or more frames transferred via DMA
#define RDY4TX         0x0100 // Ready to accept TX frame for transfer
#define TXUNDERRUN     0x0200 // Ran out of data on transfer
#define RXMISS         0x0400 // RX frame(s) have been lost
#define RX128          0x0800 // 128 bytes on an incoming frame received
#define RXDEST         0x8000 // Incoming frame passed RX DA filter

// Register 10 - Receive miss counter
#define MISSCOUNT_MASK 0xFFC0 // Running count of missed RX frames mask

// Register 12 - Transmit collision counter
#define COLCOUNT_MASK  0xFFC0 // Running count of transmit collisions

// Register 14 - Line status bits
#define LINKOK         0x0080 // 10Base-T link ok
#define AUI            0x0100 // AUI link ok
#define BT10           0x0200 // 10Base-T link active
#define POLARITYOK     0x1000 // 10Base-T polarity is correct
#define CRS            0x4000 // Frame is currently being received

// Register 16 - Self status bits
#define ACTIVE33       0x0040 // Power supply is 3.3v
#define INITD          0x0080 // CS8900A reset init is complete
#define SIBUSY         0x0100 // EEPROM is currently being accessed
#define EE_PRESENT     0x0200 // EEPROM is present
#define EEOK           0x0400 // EEPROM checksum was OK on last readout
#define EL_PRESENT     0x0800 // External EEPROM decode logic is present
#define EESIZE         0x1000 // EEPROM size bit

// Register 18 - Bus status bits
#define TXBIDERROR     0x0080 // Request to transmit will not be honored
#define RDY4TXNOW      0x0100 // Same as RDY4TX bit in register C

// Register 1C - AUI time domain reflectometer counter
#define AUICOUNT_MASK  0xFFC0 // Time domain count mask

/**********************************************************************
 * Ethernet packet structure
 *********************************************************************/

// Basic data frame
typedef struct
{
   UNS_8    daddr [6];          // Destination ethernet address
   UNS_8    saddr [6];          // Source ethernet address
   UNS_16   datalen;            // Data buffer length
   UNS_8    buffer [1550];      // Data buffer
} buffer_t;

// Define IRQACTIVE if interrupts are active, otherwise polling mode
// is assummed
//#define IRQACTIVE

/**********************************************************************
 * Main functions - initialization
 *********************************************************************/

// Initialize the ethernet controller
INT_32 enet_init (void);

// Disable the receiver and transmitter
void enet_disable_transceiver (void);

// Enable the receiver and transmitter
void enet_enable_transceiver (void);

// Set PP pointer address
void enet_set_pp_addr(void *address, INT_32 autoinc);

/**********************************************************************
 * Main functions - Interrupt handling
 *********************************************************************/

// Ethernet receive interrupt handler
void enet_rx_event (UNS_16 status);

// Ethernet transmit interrupt handler
void enet_tx_event (UNS_16 status);

// Ethernet buffer interrupt handler
void enet_buf_event (UNS_16 status);

// Ethernet Transmit ready/Receive interrupt
#ifdef IRQACTIVE
__irq void enet_isr (void);
#else
void enet_isr (void);
#endif

// Configure Ethernet IRQ number
void enet_set_irq_number(enet_int_t irq_num);

// Configure Ethernet DMA channel number
void enet_set_dma_chan(enet_dma_t irq_num);

/**********************************************************************
 * Main functions - Data tansmission
 *********************************************************************/

// Write data to the current PP register address
void enet_write_data(UNS_16 data);

// Write data to an I/O port
void enet_write_port(tx_port_t port_id, UNS_16 data);

// Write a block of data to a PP area at current PP address
void enet_write_block(UNS_16 *data, INT_32 len);

// Initialize PP address and write a block of data to the PP area
void enet_write_block_auto_increament(UNS_16 address, 
                                      UNS_16 *data, 
                                      INT_32 len);

// Builds an ethernet packet from the data and destination address
INT_32 enet_build_packet (char * buffer, 
                          INT_32 mlen, 
                          UNS_8 * daddr, 
                          char * packet);

// Sends a pre-built packet out over ethernet
void enet_send_packet (char *packet, INT_32 plen);

// Queue a new data packet for transfer via ethernet
void enet_send (char *buffer, INT_32 mlen, UNS_8 *daddr);

/**********************************************************************
 * Main functions - Data reception
 *********************************************************************/

// Read data from the current PP register address
UNS_16 enet_read_data(void);

// Read data from an I/O port
UNS_16 enet_read_port(rx_port_t port_id);

// Read a block of data from a PP area at current PP address
void enet_read_block(UNS_16 *data, INT_32 len);

// Initialize PP address and read a block of data from the PP area
void enet_read_block_auto_increament(UNS_16 address, 
                                     UNS_16 *data, 
                                     INT_32 len);

// See if a data packet has been received via ethernet and queued
INT_32 enet_packet_waiting (void);

// Get the present queued ethernet packet off the receive queue
INT_32 enet_get_packet (char *buffer);

// Get the size of the present queued ethernet packet 
UNS_16 enet_rx_packet_data_size(void);

// Get the source address of the queued ethernet packet
void enet_get_saddr (char *saddr); 

// Get the data portion of the queued ethernet packet
void enet_get_data (char *buffer);

// Get the length of the queued ethernet packet (data portion)
INT_32 enet_get_length (void);

// Clear the presently queued message off the receive queue
void enet_clear_queued_msg (void);

/**********************************************************************
 * Main functions - information functions
 *********************************************************************/

// Sets the ethernet address
void enet_set_address (UNS_8 *eaddr);

// Returns the ethernet address
void enet_get_address (UNS_8 *eaddr);

// Returns the chip identification
UNS_32 enet_get_chipid (void);

// Resets the CS8900 chip via software
/* WARNING!!!
 *     This function requires a typical delay of 10mSec to complete.  
 *     To avoid tying this driver to a specific platform, the user must
 *     accomidate this delay in the calling function!!!
*/
void enet_reset(void);

#endif  // CS8900_ENET_IF_DRIVER_H