📄 kev7a400_enet_if_abs_driver.c
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/**********************************************************************
* $Workfile: KEV7A400_enet_if_abs_driver.c $
* $Revision: 1.1 $
* $Author: MaysR $
* $Date: Aug 29 2002 08:59:52 $
*
* Project: Interface functions for the CS8900 Ethernet controller.
*
* Description:
* This file contains functions to directly control hardware
* related to reading and writing data to the ethernet controller
* on the IO board of the KEV7A400 EVB, or controlling functions
* external to the ethernet controller. These functions were
* segregated from the main ethernet packet driver to provide an
* extra level of abstraction between the way the driver accesses
* data in the ethernet controller and the actual accesses
* themselves.
*
* SPECIAL DRIVER REQUIREMENTS FOR SHARP
* At present, the Sharp KEV7A400 does not generate the needed
* timing to access the CS8900A ethernet controller without
* external logic. The CS8900A requires a read strobe for each
* data item read from the controller. Because the KEV7A400 reads
* blocks of data by holding the chip select and read lines active
* while only changing the address, the software driver must
* perform a write function before any read of the controller for
* data to be read correctly. A block of writes does not have this
* restriction. In this driver sublayer, most reads will be
* executed after a dummy write. (The dummy write will be an update
* of the PacketPage pointer, which a copy of is maintained and
* used by the driver.
*
* References: LH7A400 User's Guide
*
* Revision History:
* $Log: //smaicnt2/pvcs/VM/CHIPS/archives/LH7A400/Ethernet/Drivers/KEV7A400_enet_if_abs_driver.c-arc $
*
* Rev 1.1 Aug 29 2002 08:59:52 MaysR
* Added int disable function. Corrected error in int init. Cleaned
* up comments and completed some function banners.
*
* Rev 1.0 Aug 27 2002 11:41:04 MaysR
* Initial revision.
*
*
* SHARP MICROELECTRONICS OF THE AMERICAS MAKES NO REPRESENTATION
* OR WARRANTIES WITH RESPECT TO THE PERFORMANCE OF THIS SOFTWARE,
* AND SPECIFICALLY DISCLAIMS ANY RESPONSIBILITY FOR ANY DAMAGES,
* SPECIAL OR CONSEQUENTIAL, CONNECTED WITH THE USE OF THIS SOFTWARE.
*
* SHARP MICROELECTRONICS OF THE AMERICAS PROVIDES THIS SOFTWARE SOLELY
* FOR THE PURPOSE OF SOFTWARE DEVELOPMENT INCORPORATING THE USE OF A
* SHARP MICROCONTROLLER OR SYSTEM-ON-CHIP PRODUCT. USE OF THIS SOURCE
* FILE IMPLIES ACCEPTANCE OF THESE CONDITIONS.
*
* COPYRIGHT (C) 2001 SHARP MICROELECTRONICS OF THE AMERICAS, INC.
* CAMAS, WA
*
*********************************************************************/
#include "LH7A400_evb.h"
#include "LH7A400_map.h"
#include "LH7A400_gpio_driver.h"
#include "KEV7A400_enet_if_abs_driver.h"
#include "LH7A400_EVB_CPLD_driver.h"
#include <stdio.h>
/* There is a default ISR handler in the CS8900 driver named "enet_isr".
* A user could simply call it, or the user must provide an ISR handler
* to service interrupts, or disable them.
*/
extern void KEV7A400_enet_isr(void);
// List of addresses for each read and write port
UNS_16 * const enet_port_addr[8] = {(UNS_16 *) 0x30000000,
(UNS_16 *) 0x30000004,
(UNS_16 *) 0x30000008,
(UNS_16 *) 0x3000000C,
(UNS_16 *) 0x30000010,
(UNS_16 *) 0x30000014,
(UNS_16 *) 0x30000018,
(UNS_16 *) 0x3000001C};
/* If DUMMY_WRITE is set, a dummy write will occur prior to every read
* See the function "dummy_write" for additional information.
*/
UNS_32 const dummy_write_en = 1;
/**********************************************************************
*
* Function: enet_if_mem_init
*
* Purpose: Initialize the memory interface to the ethernet controller.
*
* Processing: The memory interface to the ethernet controller is
* initialized by setting up chip select 3 to the SRAM
* interface.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: Set CS3 to 16 bit data size, no retry, 2 ws bus turn around
* time, 18 read/write wait states, and nWE enabled
*
**********************************************************************/
void enet_if_mem_init (void)
{
SMC->bcr3 = SMC_BCR3_INIT;
}
/**********************************************************************
*
* Function: enet_int_init
*
* Purpose:
*
* Processing:
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
*********************************************************************/
void enet_int_init (void)
{
LH7A400_pld_init(WEAK);
LH7A400_pld_irq_setup(INTC_GPIO1INTR_BIT, WEAK);
LH7A400_pld_install_int_handler(CPLD_ETH_INT_BIT,
CPLD_ETH_INT_PRIO,
KEV7A400_enet_isr);
LH7A400_pld_enable_ext_int(ETH_INT);
}
/**********************************************************************
*
* Function: enet_int_clear
*
* Purpose: Clear an Ethernet Interrupt.
*
* Processing: Clear the SoC interrupt and the CPLD interrupt.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
*********************************************************************/
void enet_int_clear(void)
{
gpio_interrupt_clear(INTC_GPIO1INTR_BIT);
LH7A400_pld_clear_ext_int(ETH_INT);
}
/**********************************************************************
*
* Function: enet_int_disable
*
* Purpose: Disable the Ethernet Interrupt.
*
* Processing: Disable the Ethernet Interrupt.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
*********************************************************************/
void enet_int_disable(void)
{
LH7A400_pld_disable_ext_int(ETH_INT);
}
/**********************************************************************
*
* Function: enet_if_wakeup
*
* Purpose: Disables the sleep signal going to the ethernet controller.
*
* Processing:
* This function simply sets the ethernet sleep signal high by
* setting the ethernet sleep bit high in the IO board power control
* register.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
**********************************************************************/
void enet_if_wakeup (void)
{
CPLD->control.wr_io_brd_ctl |= CPLD_ETH_SLEEP;
}
/**********************************************************************
*
* Function: enet_if_sleep
*
* Purpose: Enables the sleep signal going to the ethernet controller.
*
* Processing:
* This function simply sets the ethernet sleep signal low by
* setting the ethernet sleep bit low in the IO board power control
* register.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes: None
*
**********************************************************************/
void enet_if_sleep (void)
{
CPLD->control.wr_io_brd_ctl &= (~CPLD_ETH_SLEEP);
}
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