lh7a400_ssp_driver.c

sharp的arm920t 7A400的评估板附带光盘Sharp KEVLH7A400 v0.3b Welcome to the SHARP KEV7A400 Evaluation board

* Returns: Nothing
*
* Notes:
*  This function inherrits its timeout properties from ssp_transceive()
*
**********************************************************************/
/*
data_in is the input data to the serial port transmitter.
data_out is the data output from the serial port receiver.
*/
void ssp_transceive_block(UNS_16 *data_in, 
                          UNS_16 *data_out, 
                          INT_32 wordcount)
{
	if (wordcount <= 0)
		return;
	while(wordcount--)
	{
		*data_out++ = ssp_transceive(*data_in++);
	}
}

/**********************************************************************
*
* Function: ssp_busy
*
* Purpose:
*  Return 1 if the SSP is transmitting a word
*
* Processing:
*  return the result of testing the AND of the SSP status register
*  and the BSY bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_busy(void)
{
	return (SSP->sr & SSP_SR_BSY) != 0;
}

/**********************************************************************
*
* Function: ssp_receive_fifo_full
*
* Purpose:
*  Return 1 if the SSP receive FIFO is full
*
* Processing:
*  return the result of testing the AND of the SSP status register
*  and the RFF bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_receive_fifo_full(void)
{
	return (SSP->sr & SSP_SR_RFF) != 0;
}

/**********************************************************************
*
* Function: ssp_receive_fifo_not_empty
*
* Purpose:
*  Return 1 if the SSP receive FIFO contains data
*
* Processing:
*  return the result of testing the AND of the SSP status register
*  and the RNE bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_receive_fifo_not_empty(void)
{
	return (SSP->sr & SSP_SR_RNE) != 0;
}

/**********************************************************************
*
* Function: ssp_transmit_fifo_not_full
*
* Purpose:
*  Return 1 if the SSP transmit FIFO is not full.
*
* Processing:
*  return the result of testing the AND of the SSP status register
*  and the TNF bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_transmit_fifo_not_full(void)
{
	return (SSP->sr & SSP_SR_TNF) != 0;
}

/**********************************************************************
*
* Function: ssp_transmit_fifo_empty
*
* Purpose:
*  Return 1 if the SSP transmit FIFO is empty
*
* Processing:
*  return the result of testing the AND of the SSP status register
*  and the TFE bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_transmit_fifo_empty(void)
{
	return (SSP->sr & SSP_SR_TFE) != 0;
}

/**********************************************************************
*
* Function: ssp_loopback_is_on
*
* Purpose:
*  put the SSP in loopback mode
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the 
*  LBM bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_loopback_is_on(void)
{
	return (SSP->cr1 & SSP_CR1_LBM) != 0;
}

/**********************************************************************
*
* Function: ssp_fifos_enabled
*
* Purpose:
*  Return 1 if FIFOs are enabled.
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the 
*  FEN bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_fifos_enabled(void)
{
	return (SSP->cr1 & SSP_CR1_FEN) != 0;
}

/**********************************************************************
*
* Function: ssp_int_receive_overflow_enabled
*
* Purpose:
*  Return 1 if the SSP receive overflow is enabled.
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the 
*  RORIE bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_receive_overflow_enabled(void)
{
	return (SSP->cr1 & SSP_CR1_RORIE) != 0;
}

/**********************************************************************
*
* Function: ssp_int_receive_enabled
*
* Purpose:
*  Return 1 if the SSP receiver interrupt is enabled
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the 
*  RIE bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_receive_enabled(void)
{
	return (SSP->cr1 & SSP_CR1_RIE) != 0;
}

/**********************************************************************
*
* Function: ssp_int_transmit_enabled
*
* Purpose:
*  Return 1 if the SSP transmitter interrupt is enabled
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the
*  TIE bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_transmit_enabled(void)
{
	return (SSP->cr1 & SSP_CR1_TIE) != 0;
}

/**********************************************************************
*
* Function: ssp_int_transmit_idle_enabled
*
* Purpose:
*  Return 1 if the SSP transmitter interrupt is enabled
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the 
*  TXIDLE bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_transmit_idle_enabled(void)
{
	return (SSP->cr1 & SSP_CR1_TXIDLE) != 0;
}

/**********************************************************************
*
* Function: ssp_spi_spo_is_set
*
* Purpose:
*  Return 1 if the SSP SPO bit is set
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the 
*  SPO bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_spi_spo_is_set(void)
{
	return (SSP->cr1 & SSP_CR1_SPO) != 0;
}

/**********************************************************************
*
* Function: ssp_spi_sph_is_set
*
* Purpose:
*  Return 1 if the SSP SPH bit is set
*
* Processing:
*  return the result of testing the AND of the SSP CR1 and the 
*  SPH bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_spi_sph_is_set(void)
{
	return (SSP->cr1 & SSP_CR1_SPH) != 0;
}

/**********************************************************************
*
* Function: ssp_clr_receive_overflow
*
* Purpose:
*  clear any pending SSP receiver overflow interrupts
*
* Processing:
*  Write to the ICR.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
void ssp_clr_receive_overflow(void)
{
	SSP->u.icr = SSP_IIR_RORIS;
}

/**********************************************************************
*
* Function: ssp_int_transmit
*
* Purpose:
*  Return 1 if the SSP transmitter interrupt is pending.
*
* Processing:
*  return the result of testing the AND of the SSP IIR and the 
*  TIS bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_transmit(void)
{
	return (SSP->u.iir & SSP_IIR_TIS) != 0;
}

/**********************************************************************
*
* Function: ssp_int_receive
*
* Purpose:
*  Return 1 if the SSP receiver interrupt is pending
*
* Processing:
*  return the result of testing the AND of the SSP IIR and the 
*  RIS bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_receive(void)
{
	return (SSP->u.iir & SSP_IIR_RIS) != 0;
}

/**********************************************************************
*
* Function: ssp_int_receive_overflow
*
* Purpose:
*  Return 1 if the SSP receiver overflow interrupt is pending.
*
* Processing:
*  return the result of testing the AND of the SSP IIR and the 
*  RORIS bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_receive_overflow(void)
{
	return (SSP->u.iir & SSP_IIR_RORIS) != 0;
}

/**********************************************************************
*
* Function: ssp_int_transmit_idle
*
* Purpose:
*  Return 1 if the SSP transmitter idle interrupt is pending.
*
* Processing:
*  return the result of testing the AND of the SSP IIR and the 
*  TXIDLE bit for non-equality to zero
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
INT_32 ssp_int_transmit_idle(void)
{
   return (SSP->u.iir & SSP_IIR_TXIDLE) != 0;
}

/**********************************************************************
*
* Function: ssp_disable_fifos
*
* Purpose:
*  disable SSP transmitter and receiver FIFOs
*
* Processing:
*  Clear the FIFO enable bit in Control Register 1
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
void ssp_disable_fifos(void)
{
   SSP->cr1 &= ~SSP_CR1_FEN;
}

/**********************************************************************
*
* Function: ssp_enable_fifos
*
* Purpose:
*  enable SSP transmitter and receiver FIFOs
*
* Processing:
*  Set the FIFO enable bit in Control Register 1
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
void ssp_enable_fifos(void)
{
   SSP->cr1 |= SSP_CR1_FEN;
}

/**********************************************************************
*
* Function: ssp_flush_fifos
*
* Purpose: 
*   empty SSP transmitter and receiver FIFOs
*
* Processing:
*  Record the state of the FIFO enable bit. Disable FIFOs. Restore
*  the state of the FIFO enable bit.
*
* Parameters: None
*
* Outputs: None
*
* Returns: Nothing
*
* Notes:
*
**********************************************************************/
void ssp_flush_fifos(void)
{
   UNS_32 volatile temp = SSP->cr1 & SSP_CR1_FEN;
   /* disable fifos to flush */
   SSP->cr1 &= ~SSP_CR1_FEN;
   /* restore previous state */
   SSP->cr1 |= temp;
}