📄 agc.map.rpt
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Analysis & Synthesis report for agc
Thu Sep 30 23:03:51 2004
Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Analysis & Synthesis Summary
3. Analysis & Synthesis Settings
4. Analysis & Synthesis Default Parameter Settings
5. Analysis & Synthesis Files Read
6. Analysis & Synthesis Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2004 Altera Corporation
Any megafunction design, and related netlist (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only
to program PLD devices (but not masked PLD devices) from Altera. Any
other use of such megafunction design, netlist, support information,
device programming or simulation file, or any other related documentation
or information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to the
intellectual property, including patents, copyrights, trademarks, trade
secrets, or maskworks, embodied in any such megafunction design, netlist,
support information, device programming or simulation file, or any other
related documentation or information provided by Altera or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.
+---------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+-----------------------------+---------------------------------------+
; Analysis & Synthesis Status ; Successful - Thu Sep 30 23:03:51 2004 ;
; Revision Name ; agc ;
; Top-level Entity Name ; AGC ;
; Family ; Cyclone ;
+-----------------------------+---------------------------------------+
+----------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings ;
+-----------------------------------------------------------------------------------------
; Option ; Setting ; Default Value ;
+---------------------------------------------------------+--------------+---------------+
; Top-level entity name ; AGC ; ;
; Family name ; Cyclone ; Stratix ;
; Auto Resource Sharing ; Off ; Off ;
; Auto Shift Register Replacement ; On ; On ;
; Auto RAM Replacement ; On ; On ;
; Auto ROM Replacement ; On ; On ;
; Allow register retiming to trade off Tsu/Tco with Fmax ; On ; On ;
; Perform gate-level register retiming ; Off ; Off ;
; Perform WYSIWYG Primitive Resynthesis ; Off ; Off ;
; Remove Duplicate Logic ; On ; On ;
; Auto Open-Drain Pins ; On ; On ;
; Auto Carry Chains ; On ; On ;
; Carry Chain Length -- Stratix/Stratix GX/Cyclone/MAX II ; 70 ; 70 ;
; Optimization Technique -- Cyclone ; Balanced ; Balanced ;
; Auto Global Register Control Signals ; On ; On ;
; Auto Global Clock ; On ; On ;
; Limit AHDL Integers to 32 Bits ; Off ; Off ;
; Ignore SOFT Buffers ; On ; On ;
; Ignore LCELL Buffers ; Off ; Off ;
; Ignore ROW GLOBAL Buffers ; Off ; Off ;
; Ignore GLOBAL Buffers ; Off ; Off ;
; Ignore CASCADE Buffers ; Off ; Off ;
; Ignore CARRY Buffers ; Off ; Off ;
; Remove Duplicate Registers ; On ; On ;
; Remove Redundant Logic Cells ; Off ; Off ;
; Power-Up Don't Care ; On ; On ;
; NOT Gate Push-Back ; On ; On ;
; State Machine Processing ; Auto ; Auto ;
; VHDL Version ; VHDL93 ; VHDL93 ;
; Verilog Version ; Verilog_2001 ; Verilog_2001 ;
; Preserve fewer node names ; On ; On ;
; Disk space/compilation speed tradeoff ; Normal ; Normal ;
; Create Debugging Nodes for IP Cores ; off ; off ;
+---------------------------------------------------------+--------------+---------------+
+-------------------------------------------------+
; Analysis & Synthesis Default Parameter Settings ;
+--------------------------------------------------
; Name ; Setting ;
+--------------------+----------------------------+
; CARRY_CHAIN ; MANUAL ;
; CASCADE_CHAIN ; MANUAL ;
; OPTIMIZE_FOR_SPEED ; 5 ;
; STYLE ; FAST ;
+--------------------+----------------------------+
+-------------------------------------------------------------------+
; Analysis & Synthesis Files Read ;
+--------------------------------------------------------------------
; File Name ; Read ;
+------------------------------------------------------------+------+
; agc.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/lpm_mult.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/multcore.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/mul_lfrg.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/mpar_add.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/lpm_add_sub.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/addcore.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/a_csnbuffer.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/altshift.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/lpm_abs.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/parallel_add.tdf ; Read ;
; d:/fpga/test/agc/db/par_add_bla.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/lpm_compare.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/comptree.tdf ; Read ;
; c:/altera/quartus/libraries/megafunctions/cmpchain.tdf ; Read ;
+------------------------------------------------------------+------+
+--------------------------------+
; Analysis & Synthesis Messages ;
+--------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version
Info: Processing started: Thu Sep 30 23:03:44 2004
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off agc -c agc --generate_functional_sim_netlist
Info: Found 1 design units and 1 entities in source file agc.tdf
Info: Found entity 1: AGC
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/lpm_mult.tdf
Info: Found entity 1: lpm_mult
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/multcore.tdf
Info: Found entity 1: multcore
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/mul_lfrg.tdf
Info: Found entity 1: mul_lfrg
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/mpar_add.tdf
Info: Found entity 1: mpar_add
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/lpm_add_sub.tdf
Info: Found entity 1: lpm_add_sub
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/addcore.tdf
Info: Found entity 1: addcore
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/a_csnbuffer.tdf
Info: Found entity 1: a_csnbuffer
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/altshift.tdf
Info: Found entity 1: altshift
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/lpm_abs.tdf
Info: Found entity 1: lpm_abs
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/parallel_add.tdf
Info: Found entity 1: parallel_add
Info: Found 1 design units and 1 entities in source file db/par_add_bla.tdf
Info: Found entity 1: par_add_bla
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/lpm_compare.tdf
Info: Found entity 1: lpm_compare
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/comptree.tdf
Info: Found entity 1: comptree
Info: Found 1 design units and 1 entities in source file c:/altera/quartus/libraries/megafunctions/cmpchain.tdf
Info: Found entity 1: cmpchain
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
Info: Processing ended: Thu Sep 30 23:03:51 2004
Info: Elapsed time: 00:00:07
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