halfbandfilter.tdf

《FPGA嵌入式应用系统开发典型实例》-书的光盘资料

CONSTANT H1 = 1023;
CONSTANT H3 = 11;
CONSTANT H5 = 964;
CONSTANT H7 = 306;
CONSTANT H8 = 512;
INCLUDE "LPM_MULT.INC";
SUBDESIGN HALFBANDFILTER
(
	CLK1X:			INPUT;
	CLK2X:			INPUT;
	DIN[7..0]:		INPUT;
	DOUT[15..0]:	OUTPUT;
)
VARIABLE
	SAMPLES[7..0][7..0]:		DFF;
	PARTSUM[3..0][8..0]:		DFF;
	SUM[20..0]:					DFF;
	PRODUCT[3..0][18..0]:		NODE;
	CENTER[17..0]:				NODE;
	CENTER_DELAYED[17..0]:		DFF;
	DOUT[15..0]:				DFF;
BEGIN
	SAMPLES[][].CLK = CLK1X;
	PARTSUM[][].CLK = CLK1X;
	SUM[].CLK = CLK1X;
	CENTER_DELAYED[].CLK = CLK1X;
	DOUT[].CLK = CLK2X;
	SAMPLES[7..1][].D = SAMPLES[6..0][].Q;
	SAMPLES[0][].D = DIN[];
	PARTSUM[0][].D = (SAMPLES[7][7].Q,SAMPLES[7][].Q) + (SAMPLES[0][7].Q,SAMPLES[0][].Q);
	PARTSUM[1][].D = (SAMPLES[6][7].Q,SAMPLES[6][].Q) + (SAMPLES[1][7].Q,SAMPLES[1][].Q);
	PARTSUM[2][].D = (SAMPLES[5][7].Q,SAMPLES[5][].Q) + (SAMPLES[2][7].Q,SAMPLES[2][].Q);
	PARTSUM[3][].D = (SAMPLES[4][7].Q,SAMPLES[4][].Q) + (SAMPLES[3][7].Q,SAMPLES[3][].Q);
	
	PRODUCT[0][] = LPM_MULT(.DATAA[] = PARTSUM[0][].Q, .DATAB[] = H1, .CLOCK = CLK1X)
		WITH (LPM_WIDTHA = 9, LPM_WIDTHB = 10, LPM_WIDTHS = 10, LPM_WIDTHP = 19, LPM_PIPELINE = 1)
		RETURNS(.RESULT[]);
	PRODUCT[1][] = LPM_MULT(.DATAA[] = PARTSUM[1][].Q, .DATAB[] = H3, .CLOCK = CLK1X)
		WITH (LPM_WIDTHA = 9, LPM_WIDTHB = 10, LPM_WIDTHS = 10, LPM_WIDTHP = 19, LPM_PIPELINE = 1)
		RETURNS(.RESULT[]);
	PRODUCT[2][] = LPM_MULT(.DATAA[] = PARTSUM[2][].Q, .DATAB[] = H5, .CLOCK = CLK1X)
		WITH (LPM_WIDTHA = 9, LPM_WIDTHB = 10, LPM_WIDTHS = 10, LPM_WIDTHP = 19, LPM_PIPELINE = 1)
		RETURNS(.RESULT[]);
	PRODUCT[3][] = LPM_MULT(.DATAA[] = PARTSUM[3][].Q, .DATAB[] = H7, .CLOCK = CLK1X)
		WITH (LPM_WIDTHA = 9, LPM_WIDTHB = 10, LPM_WIDTHS = 10, LPM_WIDTHP = 19, LPM_PIPELINE = 1)
		RETURNS(.RESULT[]);
	CENTER[] = LPM_MULT(.DATAA[] = SAMPLES[4][].Q, .DATAB[] = H8, .CLOCK = CLK1X)
		WITH (LPM_WIDTHA = 8, LPM_WIDTHB = 10, LPM_WIDTHS = 10, LPM_WIDTHP = 18, LPM_PIPELINE = 1)
		RETURNS(.RESULT[]);
	SUM[].D = (PRODUCT[0][18],PRODUCT[0][18],PRODUCT[0][])
			+ (PRODUCT[1][18],PRODUCT[1][18],PRODUCT[1][])
			+ (PRODUCT[2][18],PRODUCT[2][18],PRODUCT[2][])	
			+ (PRODUCT[3][18],PRODUCT[3][18],PRODUCT[3][]);
	CENTER_DELAYED[].D = CENTER[];
	IF CLK1X == 0 THEN
		DOUT[].D = CENTER_DELAYED[17..2].Q;
	ELSE
		DOUT[].D = SUM[20..5].Q;
	END IF;
END;