rmfilter.vhd

《FPGA嵌入式应用系统开发典型实例》-书的光盘资料

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_signed.all;

library lpm;
use lpm.lpm_components.all;
entity rmfilter is
port(	clk:	in	std_logic;								--码片速率的四倍
		nclk:	in	std_logic;								--码片速率的四倍
		din:	in	std_logic_vector(7 downto 0);			--ADC之后的数据
		dout:	out	std_logic_vector(21 downto 0)			--滤波之后的数据
	);	
end rmfilter;

architecture rmf_arch of rmfilter is
type registers is array (0 to 22) of std_logic_vector(7 downto 0);
signal reg: registers;
type summary is array (0 to 11) of std_logic_vector(8 downto 0);
signal sum: summary;
type tap is array (0 to 8) of std_logic_vector(5 downto 0);
signal a: tap;
signal b: tap;
type rom is array (0 to 8) of std_logic_vector(8 downto 0);
signal roma_q: rom;
signal romb_q: rom;
type rom_sum is array (0 to 8) of std_logic_vector(9 downto 0);
signal sumrom: rom_sum;

begin
	shift:process(clk,din)
	begin
		if clk'event and clk='1' then
			for i in 1 to 22 loop
				reg(i) <= reg(i-1);
			end loop;
			reg(0) <= din;
		end if;
	end process;
	 
adder: 	process(din,clk)
		begin
     		if clk'event and clk='1' then
     			for i in 1 to 11 loop
     				sum(i) <= (reg(i-1)(7)&reg(i-1)) + (reg(22-i)(7)&reg(22-i));
     			end loop;
     			sum(0) <= (din(7)&din) + (reg(22)(7)&reg(22));
     		end if;
     		--将数据组合成9个地址矢量
     			--第一组
     		for i in 0 to 8 loop
     			a(i) <= (sum(0)(i)&sum(1)(i)&sum(2)(i)&sum(3)(i)&sum(4)(i)&sum(5)(i)); 
     		end loop;
     			--第二组
     		for i in 0 to 8 loop
     			b(i) <= (sum(6)(i)&sum(7)(i)&sum(8)(i)&sum(9)(i)&sum(10)(i)&sum(11)(i));
     		end loop;
		end process;
--第一组九个存储器
rom_a0:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(0),inclock=>clk,outclock=>clk,q=>roma_q(0));
rom_a1:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(1),inclock=>clk,outclock=>clk,q=>roma_q(1));
rom_a2:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(2),inclock=>clk,outclock=>clk,q=>roma_q(2));
rom_a3:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(3),inclock=>clk,outclock=>clk,q=>roma_q(3));
rom_a4:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(4),inclock=>clk,outclock=>clk,q=>roma_q(4));
rom_a5:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(5),inclock=>clk,outclock=>clk,q=>roma_q(5));
rom_a6:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(6),inclock=>clk,outclock=>clk,q=>roma_q(6));
rom_a7:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_a.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(7),inclock=>clk,outclock=>clk,q=>roma_q(7));
rom_a8:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\work\rmf\rom_asign.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>a(8),inclock=>clk,outclock=>clk,q=>roma_q(8));
--第二组九个存储器
romb0:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(0),inclock=>clk,outclock=>clk,q=>romb_q(0));
romb1:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(1),inclock=>clk,outclock=>clk,q=>romb_q(1));
romb2:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(2),inclock=>clk,outclock=>clk,q=>romb_q(2));
romb3:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(3),inclock=>clk,outclock=>clk,q=>romb_q(3));
romb4:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(4),inclock=>clk,outclock=>clk,q=>romb_q(4));
romb5:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(5),inclock=>clk,outclock=>clk,q=>romb_q(5));
romb6:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(6),inclock=>clk,outclock=>clk,q=>romb_q(6));
romb7:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_b.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(7),inclock=>clk,outclock=>clk,q=>romb_q(7));
romb8:	lpm_rom
		generic MAP (lpm_width=>9,lpm_widthad=>6,lpm_file=>"d:\qdesigns\wok\rmf\rom_bsign.mif",lpm_address_control=>"registered",lpm_outdata=>"registered")
		port map (address=>b(8),inclock=>clk,outclock=>clk,q=>romb_q(8));

	process(roma_q,romb_q)
	begin
    	for i in 0 to 8 loop
    		sumrom(i) <= (roma_q(i)(8)&roma_q(i)) + (romb_q(i)(8)&romb_q(i));
    	end loop;
    end process;	
		
--移位相加
shiftadder:	process(nclk)
			begin
				if nclk'event and nclk='1' then
					dout <= (sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0)(9)&sumrom(0))
    						+ (sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)(9)&sumrom(1)&'0')
    						+ (sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)(9)&sumrom(2)&'0'&'0')
    						+ (sumrom(3)(9)&sumrom(3)(9)&sumrom(3)(9)&sumrom(3)(9)&sumrom(3)(9)&sumrom(3)(9)&sumrom(3)(9)&sumrom(3)(9)&sumrom(3)(9)&sumrom(3)&'0'&'0'&'0')
    						+ (sumrom(4)(9)&sumrom(4)(9)&sumrom(4)(9)&sumrom(4)(9)&sumrom(4)(9)&sumrom(4)(9)&sumrom(4)(9)&sumrom(4)(9)&sumrom(4)&'0'&'0'&'0'&'0')
    						+ (sumrom(5)(9)&sumrom(5)(9)&sumrom(5)(9)&sumrom(5)(9)&sumrom(5)(9)&sumrom(5)(9)&sumrom(5)(9)&sumrom(5)&'0'&'0'&'0'&'0'&'0')
    						+ (sumrom(6)(9)&sumrom(6)(9)&sumrom(6)(9)&sumrom(6)(9)&sumrom(6)(9)&sumrom(6)(9)&sumrom(6)&'0'&'0'&'0'&'0'&'0'&'0')
    						+ (sumrom(7)(9)&sumrom(7)(9)&sumrom(7)(9)&sumrom(7)(9)&sumrom(7)(9)&sumrom(7)&'0'&'0'&'0'&'0'&'0'&'0'&'0')
							+ (sumrom(8)(9)&sumrom(8)(9)&sumrom(8)(9)&sumrom(8)(9)&sumrom(8)&'0'&'0'&'0'&'0'&'0'&'0'&'0'&'0');
    			end if;
			end process;
end rmf_arch;