frequency.map.eqn

《FPGA嵌入式应用系统开发典型实例》-书的光盘资料

--operation mode is normal

D1L3 = P1_selnose[8][8] & P1_selnose[9][9] & D1L1 & D1L2;


--P1L3 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|selnose[0][0]~514
--operation mode is normal

P1L3 = E3_lcarry[1] # E3_lcarry[0] & !E4L33;


--P1_selnose[0][0] is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|selnose[0][0]
--operation mode is normal

P1_selnose[0][0] = E3_lcarry[2] # E3_lcarry[3] # P1L3 # !P1L01;


--S93L52 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00025|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~165
--operation mode is normal

S93L52_carry_eqn = S93L42;
S93L52 = !S93L52_carry_eqn;


--P1_selnose[11][11] is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|selnose[11][11]
--operation mode is normal

P1_selnose[11][11] = S93L52 & P1L4;


--S24L72 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00027|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~177
--operation mode is normal

S24L72_carry_eqn = S24L62;
S24L72 = S24L72_carry_eqn;


--P1_selnose[12][12] is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|selnose[12][12]
--operation mode is normal

P1_selnose[12][12] = S24L72 & !E3_lcarry[13] & !E3_lcarry[14] & !E3L33;


--S54L92 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00029|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~189
--operation mode is normal

S54L92_carry_eqn = S54L82;
S54L92 = !S54L92_carry_eqn;


--P1_selnose[13][13] is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|selnose[13][13]
--operation mode is normal

P1_selnose[13][13] = S54L92 & !E3_lcarry[14] & !E3L33;


--S84L13 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00031|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~201
--operation mode is normal

S84L13_carry_eqn = S84L03;
S84L13 = S84L13_carry_eqn;


--P1_selnose[14][14] is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|selnose[14][14]
--operation mode is normal

P1_selnose[14][14] = S84L13 & !E3L33;


--D1L32 is FE_ADD_SEL:inst3|op_5~170
--operation mode is normal

D1L32 = !P1_selnose[11][11] & !P1_selnose[12][12] & !P1_selnose[13][13] & !P1_selnose[14][14];


--D1L22 is FE_ADD_SEL:inst3|op_4~157
--operation mode is normal

D1L22 = !D1L32 # !P1_selnose[0][0] # !D1L3;


--S15L33 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00033|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~213
--operation mode is normal

S15L33_carry_eqn = S15L23;
S15L33 = !S15L33_carry_eqn;


--S63L32 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00023|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~153
--operation mode is normal

S63L32_carry_eqn = S63L22;
S63L32 = S63L32_carry_eqn;


--P1_selnose[10][10] is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|selnose[10][10]
--operation mode is normal

P1_selnose[10][10] = E3_lcarry[11] # !P1L4 # !S63L32;


--S57L73 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00049|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~323
--operation mode is normal

S57L73 = D1L3 & P1_selnose[10][10] & D1L32;


--D1L4 is FE_ADD_SEL:inst3|_~151
--operation mode is normal

D1L4 = D1L3 & P1_selnose[0][0] & P1_selnose[10][10] # D1L32;


--D1L02 is FE_ADD_SEL:inst3|ADDRESS[8]~76
--operation mode is normal

D1L02 = D1L12 # P1_selnose[11][11] & !D1L5 # !D1L4;


--S45L93 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00035|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~213
--operation mode is normal

S45L93_carry_eqn = S45L73;
S45L93 = S45L93_carry_eqn;


--D1L91 is FE_ADD_SEL:inst3|ADDRESS[7]~196
--operation mode is normal

D1L91 = S45L93 & P1_selnose[0][0] & S57L73;


--D1L81 is FE_ADD_SEL:inst3|ADDRESS[7]~72
--operation mode is normal

D1L81 = D1L91 # P1_selnose[12][12] & !D1L5 # !D1L4;


--S75L93 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00037|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~213
--operation mode is normal

S75L93_carry_eqn = S75L73;
S75L93 = S75L93_carry_eqn;


--D1L71 is FE_ADD_SEL:inst3|ADDRESS[6]~197
--operation mode is normal

D1L71 = S75L93 & P1_selnose[0][0] & S57L73;


--D1L61 is FE_ADD_SEL:inst3|ADDRESS[6]~69
--operation mode is normal

D1L61 = D1L71 # P1_selnose[13][13] & !D1L5 # !D1L4;


--S06L93 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00039|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~213
--operation mode is normal

S06L93_carry_eqn = S06L73;
S06L93 = S06L93_carry_eqn;


--D1L51 is FE_ADD_SEL:inst3|ADDRESS[5]~198
--operation mode is normal

D1L51 = S06L93 & P1_selnose[0][0] & S57L73;


--D1L41 is FE_ADD_SEL:inst3|ADDRESS[5]~66
--operation mode is normal

D1L41 = D1L51 # P1_selnose[14][14] & !D1L5 # !D1L4;


--S36L93 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00041|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~213
--operation mode is normal

S36L93_carry_eqn = S36L73;
S36L93 = S36L93_carry_eqn;


--D1L31 is FE_ADD_SEL:inst3|ADDRESS[4]~199
--operation mode is normal

D1L31 = S36L93 & P1_selnose[0][0] & S57L73;


--D1L21 is FE_ADD_SEL:inst3|ADDRESS[4]~63
--operation mode is normal

D1L21 = D1L31 # S15L33 & !D1L5 # !D1L4;


--S66L93 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00043|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~213
--operation mode is normal

S66L93_carry_eqn = S66L73;
S66L93 = S66L93_carry_eqn;


--D1L11 is FE_ADD_SEL:inst3|ADDRESS[3]~200
--operation mode is normal

D1L11 = S66L93 & P1_selnose[0][0] & S57L73;


--D1L01 is FE_ADD_SEL:inst3|ADDRESS[3]~60
--operation mode is normal

D1L01 = D1L11 # S45L93 & !D1L5 # !D1L4;


--S96L93 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00045|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~213
--operation mode is normal

S96L93_carry_eqn = S96L73;
S96L93 = S96L93_carry_eqn;


--D1L9 is FE_ADD_SEL:inst3|ADDRESS[2]~201
--operation mode is normal

D1L9 = S96L93 & P1_selnose[0][0] & S57L73;


--D1L8 is FE_ADD_SEL:inst3|ADDRESS[2]~57
--operation mode is normal

D1L8 = D1L9 # S75L93 & !D1L5 # !D1L4;


--S27L93 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00047|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~213
--operation mode is normal

S27L93_carry_eqn = S27L73;
S27L93 = S27L93_carry_eqn;


--D1L7 is FE_ADD_SEL:inst3|ADDRESS[1]~202
--operation mode is normal

D1L7 = S27L93 & P1_selnose[0][0] & S57L73;


--D1L6 is FE_ADD_SEL:inst3|ADDRESS[1]~54
--operation mode is normal

D1L6 = D1L7 # S06L93 & !D1L5 # !D1L4;


--S57L53 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00049|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~217
--operation mode is normal

S57L53_carry_eqn = S57L33;
S57L53 = S57L53_carry_eqn;


--S57L63 is lpm_divide:inst1|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00049|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~292
--operation mode is normal

S57L63 = S57L83 # S36L93 & !D1L5 # !D1L4;


--B1_COSOUT[15] is INTIGRATOR_FE:inst|COSOUT[15]
--operation mode is normal

B1_COSOUT[15]_lut_out = B1L13;
B1_COSOUT[15] = DFFEAS(B1_COSOUT[15]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[14] is INTIGRATOR_FE:inst|COSOUT[14]
--operation mode is normal

B1_COSOUT[14]_lut_out = B1L92;
B1_COSOUT[14] = DFFEAS(B1_COSOUT[14]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[13] is INTIGRATOR_FE:inst|COSOUT[13]
--operation mode is normal

B1_COSOUT[13]_lut_out = B1L72;
B1_COSOUT[13] = DFFEAS(B1_COSOUT[13]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[12] is INTIGRATOR_FE:inst|COSOUT[12]
--operation mode is normal

B1_COSOUT[12]_lut_out = B1L52;
B1_COSOUT[12] = DFFEAS(B1_COSOUT[12]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[11] is INTIGRATOR_FE:inst|COSOUT[11]
--operation mode is normal

B1_COSOUT[11]_lut_out = B1L32;
B1_COSOUT[11] = DFFEAS(B1_COSOUT[11]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[10] is INTIGRATOR_FE:inst|COSOUT[10]
--operation mode is normal

B1_COSOUT[10]_lut_out = B1L12;
B1_COSOUT[10] = DFFEAS(B1_COSOUT[10]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[9] is INTIGRATOR_FE:inst|COSOUT[9]
--operation mode is normal

B1_COSOUT[9]_lut_out = B1L91;
B1_COSOUT[9] = DFFEAS(B1_COSOUT[9]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[8] is INTIGRATOR_FE:inst|COSOUT[8]
--operation mode is normal

B1_COSOUT[8]_lut_out = B1L71;
B1_COSOUT[8] = DFFEAS(B1_COSOUT[8]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[7] is INTIGRATOR_FE:inst|COSOUT[7]
--operation mode is normal

B1_COSOUT[7]_lut_out = B1L51;
B1_COSOUT[7] = DFFEAS(B1_COSOUT[7]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[6] is INTIGRATOR_FE:inst|COSOUT[6]
--operation mode is normal

B1_COSOUT[6]_lut_out = B1L31;
B1_COSOUT[6] = DFFEAS(B1_COSOUT[6]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[5] is INTIGRATOR_FE:inst|COSOUT[5]
--operation mode is normal

B1_COSOUT[5]_lut_out = B1L11;
B1_COSOUT[5] = DFFEAS(B1_COSOUT[5]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[4] is INTIGRATOR_FE:inst|COSOUT[4]
--operation mode is normal

B1_COSOUT[4]_lut_out = B1L9;
B1_COSOUT[4] = DFFEAS(B1_COSOUT[4]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[3] is INTIGRATOR_FE:inst|COSOUT[3]
--operation mode is normal

B1_COSOUT[3]_lut_out = B1L7;
B1_COSOUT[3] = DFFEAS(B1_COSOUT[3]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[2] is INTIGRATOR_FE:inst|COSOUT[2]
--operation mode is normal

B1_COSOUT[2]_lut_out = B1L5;
B1_COSOUT[2] = DFFEAS(B1_COSOUT[2]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_COSOUT[1] is INTIGRATOR_FE:inst|COSOUT[1]
--operation mode is normal

B1_COSOUT[1]_lut_out = B1L3;
B1_COSOUT[1] = DFFEAS(B1_COSOUT[1]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[15] is INTIGRATOR_FE:inst|SINOUT[15]
--operation mode is normal

B1_SINOUT[15]_lut_out = B1L26;
B1_SINOUT[15] = DFFEAS(B1_SINOUT[15]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[14] is INTIGRATOR_FE:inst|SINOUT[14]
--operation mode is normal