frequency.map.eqn

《FPGA嵌入式应用系统开发典型实例》-书的光盘资料

--M1_safe_q[7] is INTIGRATOR_FE:inst|lpm_counter:CYCLE_rtl_0|cntr_ia7:auto_generated|safe_q[7]
--operation mode is normal

M1_safe_q[7]_carry_eqn = M1L41;
M1_safe_q[7]_lut_out = M1_safe_q[7] $ (M1_safe_q[7]_carry_eqn);
M1_safe_q[7] = DFFEAS(M1_safe_q[7]_lut_out, CLK, RESET, , , , , , );


--S171L51 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~117
--operation mode is arithmetic

S171L51_carry_eqn = S171L41;
S171L51 = S351L81 $ J3_dffs[7] $ !S171L51_carry_eqn;

--S171L61 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~117COUT
--operation mode is arithmetic

S171L61 = CARRY(S351L81 & J3_dffs[7] & !S171L41 # !S351L81 & J3_dffs[7] # !S171L41);


--S171L31 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~116
--operation mode is arithmetic

S171L31_carry_eqn = S171L21;
S171L31 = S351L91 $ J3_dffs[6] $ S171L31_carry_eqn;

--S171L41 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~116COUT
--operation mode is arithmetic

S171L41 = CARRY(S351L91 & !S171L21 # !J3_dffs[6] # !S351L91 & !J3_dffs[6] & !S171L21);


--S171L11 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~115
--operation mode is arithmetic

S171L11_carry_eqn = S171L01;
S171L11 = S351L02 $ J3_dffs[5] $ !S171L11_carry_eqn;

--S171L21 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~115COUT
--operation mode is arithmetic

S171L21 = CARRY(S351L02 & J3_dffs[5] & !S171L01 # !S351L02 & J3_dffs[5] # !S171L01);


--S171L9 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~114
--operation mode is arithmetic

S171L9_carry_eqn = S171L8;
S171L9 = S351L12 $ J3_dffs[4] $ S171L9_carry_eqn;

--S171L01 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~114COUT
--operation mode is arithmetic

S171L01 = CARRY(S351L12 & !S171L8 # !J3_dffs[4] # !S351L12 & !J3_dffs[4] & !S171L8);


--S171L7 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~113
--operation mode is arithmetic

S171L7_carry_eqn = S171L6;
S171L7 = S351L22 $ J3_dffs[3] $ !S171L7_carry_eqn;

--S171L8 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~113COUT
--operation mode is arithmetic

S171L8 = CARRY(S351L22 & J3_dffs[3] & !S171L6 # !S351L22 & J3_dffs[3] # !S171L6);


--S171L5 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~112
--operation mode is arithmetic

S171L5_carry_eqn = S171L4;
S171L5 = S351L32 $ J3_dffs[2] $ S171L5_carry_eqn;

--S171L6 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~112COUT
--operation mode is arithmetic

S171L6 = CARRY(S351L32 & !S171L4 # !J3_dffs[2] # !S351L32 & !J3_dffs[2] & !S171L4);


--S171L3 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~111
--operation mode is arithmetic

S171L3_carry_eqn = S171L2;
S171L3 = S351L42 $ J3_dffs[1] $ !S171L3_carry_eqn;

--S171L4 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~111COUT
--operation mode is arithmetic

S171L4 = CARRY(S351L42 & J3_dffs[1] & !S171L2 # !S351L42 & J3_dffs[1] # !S171L2);


--S171L1 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~110
--operation mode is arithmetic

S171L1 = X2L1 $ J3_dffs[0];

--S171L2 is lpm_add_sub:inst94|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~110COUT
--operation mode is arithmetic

S171L2 = CARRY(X2L1 # !J3_dffs[0]);


--W2_q_a[7] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[7]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[7]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[7]_PORT_A_address_reg = DFFE(W2_q_a[7]_PORT_A_address, W2_q_a[7]_clock_0, , , );
W2_q_a[7]_clock_0 = CLK;
W2_q_a[7]_clock_1 = CLK;
W2_q_a[7]_PORT_A_data_out = MEMORY(, , W2_q_a[7]_PORT_A_address_reg, , , , , , W2_q_a[7]_clock_0, W2_q_a[7]_clock_1, , , , );
W2_q_a[7]_PORT_A_data_out_reg = DFFE(W2_q_a[7]_PORT_A_data_out, W2_q_a[7]_clock_1, , , );
W2_q_a[7] = W2_q_a[7]_PORT_A_data_out_reg[0];


--J5_dffs[1] is lpm_ff:inst97|dffs[1]
--operation mode is normal

J5_dffs[1]_lut_out = J1_dffs[1];
J5_dffs[1] = DFFEAS(J5_dffs[1]_lut_out, CLK, VCC, , , , , , );


--S351L71 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~91
--operation mode is normal

S351L71_carry_eqn = S351L61;
S351L71 = W2_q_a[7] $ (S351L71_carry_eqn);


--J5_dffs[0] is lpm_ff:inst97|dffs[0]
--operation mode is normal

J5_dffs[0]_lut_out = J1_dffs[0];
J5_dffs[0] = DFFEAS(J5_dffs[0]_lut_out, CLK, VCC, , , , , , );


--S351L81 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~806
--operation mode is normal

S351L81 = J5_dffs[1] & J5_dffs[0] & W2_q_a[7] # !J5_dffs[0] & S351L71 # !J5_dffs[1] & W2_q_a[7] $ (J5_dffs[0]);


--W2_q_a[6] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[6]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[6]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[6]_PORT_A_address_reg = DFFE(W2_q_a[6]_PORT_A_address, W2_q_a[6]_clock_0, , , );
W2_q_a[6]_clock_0 = CLK;
W2_q_a[6]_clock_1 = CLK;
W2_q_a[6]_PORT_A_data_out = MEMORY(, , W2_q_a[6]_PORT_A_address_reg, , , , , , W2_q_a[6]_clock_0, W2_q_a[6]_clock_1, , , , );
W2_q_a[6]_PORT_A_data_out_reg = DFFE(W2_q_a[6]_PORT_A_data_out, W2_q_a[6]_clock_1, , , );
W2_q_a[6] = W2_q_a[6]_PORT_A_data_out_reg[0];


--S351L51 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~90
--operation mode is arithmetic

S351L51_carry_eqn = S351L41;
S351L51 = W2_q_a[6] $ (!S351L51_carry_eqn);

--S351L61 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~90COUT
--operation mode is arithmetic

S351L61 = CARRY(W2_q_a[6] # !S351L41);


--S351L91 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~807
--operation mode is normal

S351L91 = J5_dffs[1] & J5_dffs[0] & W2_q_a[6] # !J5_dffs[0] & S351L51 # !J5_dffs[1] & W2_q_a[6] $ (J5_dffs[0]);


--W2_q_a[5] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[5]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[5]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[5]_PORT_A_address_reg = DFFE(W2_q_a[5]_PORT_A_address, W2_q_a[5]_clock_0, , , );
W2_q_a[5]_clock_0 = CLK;
W2_q_a[5]_clock_1 = CLK;
W2_q_a[5]_PORT_A_data_out = MEMORY(, , W2_q_a[5]_PORT_A_address_reg, , , , , , W2_q_a[5]_clock_0, W2_q_a[5]_clock_1, , , , );
W2_q_a[5]_PORT_A_data_out_reg = DFFE(W2_q_a[5]_PORT_A_data_out, W2_q_a[5]_clock_1, , , );
W2_q_a[5] = W2_q_a[5]_PORT_A_data_out_reg[0];


--S351L31 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~89
--operation mode is arithmetic

S351L31_carry_eqn = S351L21;
S351L31 = W2_q_a[5] $ (S351L31_carry_eqn);

--S351L41 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~89COUT
--operation mode is arithmetic

S351L41 = CARRY(!W2_q_a[5] & !S351L21);


--S351L02 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~808
--operation mode is normal

S351L02 = J5_dffs[1] & J5_dffs[0] & W2_q_a[5] # !J5_dffs[0] & S351L31 # !J5_dffs[1] & W2_q_a[5] $ (J5_dffs[0]);


--W2_q_a[4] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[4]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[4]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[4]_PORT_A_address_reg = DFFE(W2_q_a[4]_PORT_A_address, W2_q_a[4]_clock_0, , , );
W2_q_a[4]_clock_0 = CLK;
W2_q_a[4]_clock_1 = CLK;
W2_q_a[4]_PORT_A_data_out = MEMORY(, , W2_q_a[4]_PORT_A_address_reg, , , , , , W2_q_a[4]_clock_0, W2_q_a[4]_clock_1, , , , );
W2_q_a[4]_PORT_A_data_out_reg = DFFE(W2_q_a[4]_PORT_A_data_out, W2_q_a[4]_clock_1, , , );
W2_q_a[4] = W2_q_a[4]_PORT_A_data_out_reg[0];


--S351L11 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~88
--operation mode is arithmetic

S351L11_carry_eqn = S351L01;
S351L11 = W2_q_a[4] $ (!S351L11_carry_eqn);

--S351L21 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~88COUT
--operation mode is arithmetic

S351L21 = CARRY(W2_q_a[4] # !S351L01);


--S351L12 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~809
--operation mode is normal

S351L12 = J5_dffs[1] & J5_dffs[0] & W2_q_a[4] # !J5_dffs[0] & S351L11 # !J5_dffs[1] & W2_q_a[4] $ (J5_dffs[0]);


--W2_q_a[3] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[3]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[3]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[3]_PORT_A_address_reg = DFFE(W2_q_a[3]_PORT_A_address, W2_q_a[3]_clock_0, , , );
W2_q_a[3]_clock_0 = CLK;
W2_q_a[3]_clock_1 = CLK;
W2_q_a[3]_PORT_A_data_out = MEMORY(, , W2_q_a[3]_PORT_A_address_reg, , , , , , W2_q_a[3]_clock_0, W2_q_a[3]_clock_1, , , , );
W2_q_a[3]_PORT_A_data_out_reg = DFFE(W2_q_a[3]_PORT_A_data_out, W2_q_a[3]_clock_1, , , );
W2_q_a[3] = W2_q_a[3]_PORT_A_data_out_reg[0];


--S351L9 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~87
--operation mode is arithmetic

S351L9_carry_eqn = S351L8;
S351L9 = W2_q_a[3] $ (S351L9_carry_eqn);

--S351L01 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~87COUT
--operation mode is arithmetic

S351L01 = CARRY(!W2_q_a[3] & !S351L8);


--S351L22 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~810
--operation mode is normal

S351L22 = J5_dffs[1] & J5_dffs[0] & W2_q_a[3] # !J5_dffs[0] & S351L9 # !J5_dffs[1] & W2_q_a[3] $ (J5_dffs[0]);


--W2_q_a[2] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[2]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[2]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[2]_PORT_A_address_reg = DFFE(W2_q_a[2]_PORT_A_address, W2_q_a[2]_clock_0, , , );
W2_q_a[2]_clock_0 = CLK;
W2_q_a[2]_clock_1 = CLK;
W2_q_a[2]_PORT_A_data_out = MEMORY(, , W2_q_a[2]_PORT_A_address_reg, , , , , , W2_q_a[2]_clock_0, W2_q_a[2]_clock_1, , , , );
W2_q_a[2]_PORT_A_data_out_reg = DFFE(W2_q_a[2]_PORT_A_data_out, W2_q_a[2]_clock_1, , , );
W2_q_a[2] = W2_q_a[2]_PORT_A_data_out_reg[0];


--S351L7 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~86
--operation mode is arithmetic

S351L7_carry_eqn = S351L6;
S351L7 = W2_q_a[2] $ (!S351L7_carry_eqn);

--S351L8 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~86COUT
--operation mode is arithmetic

S351L8 = CARRY(W2_q_a[2] # !S351L6);


--S351L32 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~811
--operation mode is normal

S351L32 = J5_dffs[1] & J5_dffs[0] & W2_q_a[2] # !J5_dffs[0] & S351L7 # !J5_dffs[1] & W2_q_a[2] $ (J5_dffs[0]);


--W2_q_a[1] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[1]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[1]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[1]_PORT_A_address_reg = DFFE(W2_q_a[1]_PORT_A_address, W2_q_a[1]_clock_0, , , );
W2_q_a[1]_clock_0 = CLK;
W2_q_a[1]_clock_1 = CLK;
W2_q_a[1]_PORT_A_data_out = MEMORY(, , W2_q_a[1]_PORT_A_address_reg, , , , , , W2_q_a[1]_clock_0, W2_q_a[1]_clock_1, , , , );
W2_q_a[1]_PORT_A_data_out_reg = DFFE(W2_q_a[1]_PORT_A_data_out, W2_q_a[1]_clock_1, , , );
W2_q_a[1] = W2_q_a[1]_PORT_A_data_out_reg[0];


--S351L5 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~85
--operation mode is arithmetic

S351L5 = W2_q_a[1] $ !S351L52;

--S351L6 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~85COUT
--operation mode is arithmetic

S351L6 = CARRY(!W2_q_a[1] & S351L52);


--S351L42 is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~812
--operation mode is normal

S351L42 = J5_dffs[1] & J5_dffs[0] & W2_q_a[1] # !J5_dffs[0] & S351L5 # !J5_dffs[1] & W2_q_a[1] $ (J5_dffs[0]);


--W2_q_a[0] is lpm_rom:inst99|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[0]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W2_q_a[0]_PORT_A_address = BUS(S051L63, D2L2, D2L4, D2L6, D2L8, D2L01, D2L21, D2L41, D2L61, D2L81);
W2_q_a[0]_PORT_A_address_reg = DFFE(W2_q_a[0]_PORT_A_address, W2_q_a[0]_clock_0, , , );
W2_q_a[0]_clock_0 = CLK;
W2_q_a[0]_clock_1 = CLK;
W2_q_a[0]_PORT_A_data_out = MEMORY(, , W2_q_a[0]_PORT_A_address_reg, , , , , , W2_q_a[0]_clock_0, W2_q_a[0]_clock_1, , , , );
W2_q_a[0]_PORT_A_data_out_reg = DFFE(W2_q_a[0]_PORT_A_data_out, W2_q_a[0]_clock_1, , , );
W2_q_a[0] = W2_q_a[0]_PORT_A_data_out_reg[0];


--S351_cs_buffer[0] is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]
--operation mode is arithmetic

S351_cs_buffer[0] = W2_q_a[0];

--S351_cout[0] is lpm_add_sub:inst25|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

S351_cout[0] = CARRY(!W2_q_a[0]);


--X2L1 is lpm_mux:inst91|mux_1td:auto_generated|w_result15w~137
--operation mode is normal

X2L1 = J5_dffs[1] & J5_dffs[0] & W2_q_a[0] # !J5_dffs[0] & S351_cs_buffer[0] # !J5_dffs[1] & W2_q_a[0] $ (J5_dffs[0]);


--J3_dffs[7] is lpm_ff:inst92|dffs[7]
--operation mode is normal

J3_dffs[7]_lut_out = J4_dffs[7];
J3_dffs[7] = DFFEAS(J3_dffs[7]_lut_out, CLK, VCC, , , , , , );


--J3_dffs[6] is lpm_ff:inst92|dffs[6]
--operation mode is normal

J3_dffs[6]_lut_out = J4_dffs[6];
J3_dffs[6] = DFFEAS(J3_dffs[6]_lut_out, CLK, VCC, , , , , , );