frequency.map.summary

来自「《FPGA嵌入式应用系统开发典型实例》-书的光盘资料」· SUMMARY 代码 · 共 14 行

Flow Status : Successful - Sat Apr 09 13:30:12 2005
Quartus II Version : 4.2 Build 178 01/19/2005 SP 1 SJ Full Version
Revision Name : Frequency
Top-level Entity Name : Frequency
Family : Cyclone
Device : EP1C20F400C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 1,507
Total pins : 170
Total virtual pins : 0
Total memory bits : 40,960
Total PLLs : 0