📄 cc1100.lis
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02BE 0027 clr R16
02C0 L83:
02C0 2196 adiw R28,1
02C2 0E940000 xcall pop_gset2
02C6 .dbline 0 ; func end
02C6 0895 ret
02C8 ; value -> R20
02C8 ; addr -> R20
.even
02C8 _halSpiReadReg::
02C8 0E940000 xcall push_gset1
02CC 402F mov R20,R16
02CE ; }// halRfSendPacket
02CE ; /*******************************************/
02CE ; /*
02CE ; void TxCCxx00()
02CE ; {
02CE ; unsigned char i;
02CE ; halSpiWriteReg(CCxxx0_FREND0, 0x10); //CC1100:POWER=10DBM;CC2500:1DBM
02CE ; Dly1mS(25);;
02CE ; for(i=0;i<4;i++) //发四次
02CE ; {
02CE ; halRfSendPacket(txBuffer_CCxx00, sizeof(txBuffer_CCxx00));
02CE ; Dly1mS(50);
02CE ; }
02CE ; halSpiWriteReg(CCxxx0_FREND0, 0x15); //CC1100太近会收不到，将发射功率降低到-10DBM //#define CCxxx0_FREND0 0x22
02CE ; Dly1mS(50);
02CE ; halRfSendPacket(txBuffer_CCxx00, sizeof(txBuffer_CCxx00));
02CE ; Dly1mS(100);
02CE ; }
02CE ; */
02CE ; /*********************************************************/
02CE ; unsigned char halSpiReadReg(unsigned char addr)
02CE ; {
02CE ; unsigned char value;
02CE ; CLEAR_CLOCK();
02CE 9EDE xcall _CLEAR_CLOCK
02D0 ; Dly10us();Dly10us();
02D0 C6DE xcall _Dly10us
02D2 C5DE xcall _Dly10us
02D4 ; CLEAR_CSN(); // CSn=0
02D4 AFDE xcall _CLEAR_CSN
02D6 ; addr|=READ_SINGLE;
02D6 4068 ori R20,128
02D8 ; SPI_write(addr);
02D8 042F mov R16,R20
02DA F0DE xcall _SPI_write
02DC ; CLEAR_IN();
02DC A3DE xcall _CLEAR_IN
02DE ; Dly10us();Dly10us();Dly10us();Dly10us();Dly10us();
02DE BFDE xcall _Dly10us
02E0 BEDE xcall _Dly10us
02E2 BDDE xcall _Dly10us
02E4 BCDE xcall _Dly10us
02E6 BBDE xcall _Dly10us
02E8 ; value=0;
02E8 4427 clr R20
02EA ; value=SPI_read();
02EA 19DF xcall _SPI_read
02EC 402F mov R20,R16
02EE ; Dly10us();Dly10us();Dly10us();
02EE B7DE xcall _Dly10us
02F0 B6DE xcall _Dly10us
02F2 B5DE xcall _Dly10us
02F4 ; CLEAR_CLOCK();
02F4 8BDE xcall _CLEAR_CLOCK
02F6 ; CLEAR_IN();
02F6 96DE xcall _CLEAR_IN
02F8 ; SET_CSN(); // CSn=0 P_CSn=0;
02F8 9BDE xcall _SET_CSN
02FA ; return value;
02FA 042F mov R16,R20
02FC L87:
02FC 0E940000 xcall pop_gset1
0300 .dbline 0 ; func end
0300 0895 ret
0302 ; value -> R20
0302 ; i -> R22
0302 ; count -> R10
0302 ; buffer -> R12,R13
0302 ; addr -> R20
.even
0302 _halSpiReadBurstReg::
0302 0E940000 xcall push_gset4
0306 6901 movw R12,R18
0308 402F mov R20,R16
030A A884 ldd R10,y+8
030C ; }
030C ; /**************************************************/
030C ; void halSpiReadBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count)
030C ; {
030C ; unsigned char i,value;
030C ; CLEAR_CLOCK();
030C 7FDE xcall _CLEAR_CLOCK
030E ; Dly10us();Dly10us();
030E A7DE xcall _Dly10us
0310 A6DE xcall _Dly10us
0312 ; CLEAR_CSN(); // CSn=0 P_CSn=0;
0312 90DE xcall _CLEAR_CSN
0314 ; addr|=READ_BURST;
0314 406C ori R20,192
0316 ; SPI_write(addr);
0316 042F mov R16,R20
0318 D1DE xcall _SPI_write
031A ; CLEAR_IN();
031A 84DE xcall _CLEAR_IN
031C ; Dly10us();Dly10us();Dly10us();Dly10us();Dly10us();
031C A0DE xcall _Dly10us
031E 9FDE xcall _Dly10us
0320 9EDE xcall _Dly10us
0322 9DDE xcall _Dly10us
0324 9CDE xcall _Dly10us
0326 ; value=0;
0326 4427 clr R20
0328 ; for(i=0;i<count;i++)
0328 6627 clr R22
032A 08C0 xjmp L92
032C L89:
032C F8DE xcall _SPI_read
032E 402F mov R20,R16
0330 E62F mov R30,R22
0332 FF27 clr R31
0334 EC0D add R30,R12
0336 FD1D adc R31,R13
0338 4083 std z+0,R20
033A L90:
033A 6395 inc R22
033C L92:
033C 6A15 cp R22,R10
033E B0F3 brlo L89
0340 ; {
0340 ; value=SPI_read();
0340 ; buffer[i]=value;
0340 ; }
0340 ; Dly10us();Dly10us();Dly10us();
0340 8EDE xcall _Dly10us
0342 8DDE xcall _Dly10us
0344 8CDE xcall _Dly10us
0346 ; CLEAR_CLOCK();
0346 62DE xcall _CLEAR_CLOCK
0348 ; CLEAR_IN();
0348 6DDE xcall _CLEAR_IN
034A ; SET_CSN(); // CSn=0 P_CSn=0;
034A 72DE xcall _SET_CSN
034C L88:
034C 0E940000 xcall pop_gset4
0350 .dbline 0 ; func end
0350 0895 ret
0352 ; rd_pin -> <dead>
0352 ; value -> R22
0352 ; addr -> R20
.even
0352 _halSpiReadStatus::
0352 0E940000 xcall push_gset2
0356 402F mov R20,R16
0358 ; }
0358 ; /**************************************************/
0358 ; unsigned char halSpiReadStatus(unsigned char addr)
0358 ; {
0358 ; unsigned char value,rd_pin;
0358 ; CLEAR_CSN(); // CSn=0 P_CSn=0;
0358 6DDE xcall _CLEAR_CSN
035A L94:
035A L95:
035A ; while(GET_OUT());
035A 6EDE xcall _GET_OUT
035C 0030 cpi R16,0
035E 0107 cpc R16,R17
0360 E1F7 brne L94
0362 X5:
0362 ; CLEAR_CLOCK(); //SCLK=0 //P_SCLK=0;
0362 54DE xcall _CLEAR_CLOCK
0364 ; addr|=READ_BURST;
0364 406C ori R20,192
0366 ; SPI_write(addr);
0366 042F mov R16,R20
0368 A9DE xcall _SPI_write
036A ; value=SPI_read();
036A D9DE xcall _SPI_read
036C 602F mov R22,R16
036E ; CLEAR_CLOCK(); //SCLK=0 //P_SCLK=0;
036E 4EDE xcall _CLEAR_CLOCK
0370 ; CLEAR_IN(); // SI=0 P_SI=0;
0370 59DE xcall _CLEAR_IN
0372 ; SET_CSN(); //CSn=1 P_CSn=1;
0372 5EDE xcall _SET_CSN
0374 ; return value;
0374 062F mov R16,R22
0376 L93:
0376 0E940000 xcall pop_gset2
037A .dbline 0 ; func end
037A 0895 ret
.even
037C _halRfWriteRfSettings::
037C ; }// halSpiReadStatus
037C ; /**************************************************/
037C ; void halRfWriteRfSettings()
037C ; {
037C L98:
037C ; l_setCC1100:
037C ; halSpiWriteReg(CCxxx0_FSCTRL1, 0x0C);
037C 2CE0 ldi R18,12
037E 0BE0 ldi R16,11
0380 07DF xcall _halSpiWriteReg
0382 ;
0382 ; halSpiWriteReg(CCxxx0_FSCTRL0, 0x00);
0382 2227 clr R18
0384 0CE0 ldi R16,12
0386 04DF xcall _halSpiWriteReg
0388 ; halSpiWriteReg(CCxxx0_FREQ2, 0x10);
0388 20E1 ldi R18,16
038A 0DE0 ldi R16,13
038C 01DF xcall _halSpiWriteReg
038E ; halSpiWriteReg(CCxxx0_FREQ1, 0x09);
038E 29E0 ldi R18,9
0390 0EE0 ldi R16,14
0392 FEDE xcall _halSpiWriteReg
0394 ; halSpiWriteReg(CCxxx0_FREQ0, 0x7B);
0394 2BE7 ldi R18,123
0396 0FE0 ldi R16,15
0398 FBDE xcall _halSpiWriteReg
039A ; halSpiWriteReg(CCxxx0_MDMCFG4, 0xC6);
039A 26EC ldi R18,198
039C 00E1 ldi R16,16
039E F8DE xcall _halSpiWriteReg
03A0 ; halSpiWriteReg(CCxxx0_MDMCFG3, 0x83);
03A0 23E8 ldi R18,131
03A2 01E1 ldi R16,17
03A4 F5DE xcall _halSpiWriteReg
03A6 ; halSpiWriteReg(CCxxx0_MDMCFG2, 0x02);
03A6 22E0 ldi R18,2
03A8 02E1 ldi R16,18
03AA F2DE xcall _halSpiWriteReg
03AC ; halSpiWriteReg(CCxxx0_MDMCFG1, 0x22);
03AC 22E2 ldi R18,34
03AE 03E1 ldi R16,19
03B0 EFDE xcall _halSpiWriteReg
03B2 ; halSpiWriteReg(CCxxx0_MDMCFG0, 0xF8);
03B2 28EF ldi R18,248
03B4 04E1 ldi R16,20
03B6 ECDE xcall _halSpiWriteReg
03B8 ; halSpiWriteReg(CCxxx0_CHANNR, 0x0A);
03B8 2AE0 ldi R18,10
03BA 0AE0 ldi R16,10
03BC E9DE xcall _halSpiWriteReg
03BE ; halSpiWriteReg(CCxxx0_DEVIATN, 0x30);
03BE 20E3 ldi R18,48
03C0 05E1 ldi R16,21
03C2 E6DE xcall _halSpiWriteReg
03C4 ; halSpiWriteReg(CCxxx0_FREND1, 0x56);
03C4 26E5 ldi R18,86
03C6 01E2 ldi R16,33
03C8 E3DE xcall _halSpiWriteReg
03CA ; halSpiWriteReg(CCxxx0_FREND0, 0x10);
03CA 20E1 ldi R18,16
03CC 02E2 ldi R16,34
03CE E0DE xcall _halSpiWriteReg
03D0 ;
03D0 ;
03D0 ; halSpiWriteReg(CCxxx0_MCSM0, 0x18);
03D0 28E1 ldi R18,24
03D2 08E1 ldi R16,24
03D4 DDDE xcall _halSpiWriteReg
03D6 ; halSpiWriteReg(CCxxx0_FOCCFG, 0x15);
03D6 25E1 ldi R18,21
03D8 09E1 ldi R16,25
03DA DADE xcall _halSpiWriteReg
03DC ; halSpiWriteReg(CCxxx0_BSCFG, 0x6C);
03DC 2CE6 ldi R18,108
03DE 0AE1 ldi R16,26
03E0 D7DE xcall _halSpiWriteReg
03E2 ; halSpiWriteReg(CCxxx0_AGCCTRL2, 0x03);
03E2 23E0 ldi R18,3
03E4 0BE1 ldi R16,27
03E6 D4DE xcall _halSpiWriteReg
03E8 ; halSpiWriteReg(CCxxx0_AGCCTRL0, 0x91);
03E8 21E9 ldi R18,145
03EA 0DE1 ldi R16,29
03EC D1DE xcall _halSpiWriteReg
03EE ; halSpiWriteReg(CCxxx0_FSCAL3, 0xA9);
03EE 29EA ldi R18,169
03F0 03E2 ldi R16,35
03F2 CEDE xcall _halSpiWriteReg
03F4 ; halSpiWriteReg(CCxxx0_FSCAL2, 0x2A);
03F4 2AE2 ldi R18,42
03F6 04E2 ldi R16,36
03F8 CBDE xcall _halSpiWriteReg
03FA ; halSpiWriteReg(CCxxx0_FSCAL0, 0x0D);
03FA 2DE0 ldi R18,13
03FC 06E2 ldi R16,38
03FE C8DE xcall _halSpiWriteReg
0400 ; halSpiWriteReg(CCxxx0_FSTEST, 0x59);
0400 29E5 ldi R18,89
0402 09E2 ldi R16,41
0404 C5DE xcall _halSpiWriteReg
0406 ; halSpiWriteReg(CCxxx0_TEST2, 0x86);
0406 26E8 ldi R18,134
0408 0CE2 ldi R16,44
040A C2DE xcall _halSpiWriteReg
040C ; halSpiWriteReg(CCxxx0_TEST1, 0x3D);
040C 2DE3 ldi R18,61
040E 0DE2 ldi R16,45
0410 BFDE xcall _halSpiWriteReg
0412 ; halSpiWriteReg(CCxxx0_TEST0, 0x09);
0412 29E0 ldi R18,9
0414 0EE2 ldi R16,46
0416 BCDE xcall _halSpiWriteReg
0418 ;
0418 ;
0418 ; halSpiWriteReg(CCxxx0_IOCFG2, 0x24);
0418 24E2 ldi R18,36
041A 0027 clr R16
041C B9DE xcall _halSpiWriteReg
041E ;
041E ; halSpiWriteReg(CCxxx0_IOCFG0, 0x06);
041E 26E0 ldi R18,6
0420 02E0 ldi R16,2
0422 B6DE xcall _halSpiWriteReg
0424 ; halSpiWriteReg(CCxxx0_PKTCTRL1, 0x04);
0424 24E0 ldi R18,4
0426 07E0 ldi R16,7
0428 B3DE xcall _halSpiWriteReg
042A ; halSpiWriteReg(CCxxx0_PKTCTRL0, 0x05);
042A 25E0 ldi R18,5
042C 08E0 ldi R16,8
042E B0DE xcall _halSpiWriteReg
0430 ; halSpiWriteReg(CCxxx0_ADDR, 0x00);
0430 2227 clr R18
0432 09E0 ldi R16,9
0434 ADDE xcall _halSpiWriteReg
0436 ;
0436 ; halSpiWriteReg(CCxxx0_PKTLEN, 0x1F); // hejie ,接收数据长度
0436 2FE1 ldi R18,31
0438 06E0 ldi R16,6
043A AADE xcall _halSpiWriteReg
043C ; //halSpiWriteReg(CCxxx0_PKTLEN, 0xFF);
043C ;
043C ; halSpiWriteReg(CCxxx0_MCSM2, 0x08); // CCxxx0_MCSM2 修改限制时间 默认为０７ 修改为００
043C 28E0 ldi R18,8
043E 06E1 ldi R16,22
0440 A7DE xcall _halSpiWriteReg
0442 ; //halSpiWriteReg(CCxxx0_FIFOTHR, 0x07);
0442 ;
0442 ;
0442 ; if(halSpiReadReg(CCxxx0_MDMCFG1)!=0x22){
0442 03E1 ldi R16,19
0444 41DF xcall _halSpiReadReg
0446 0232 cpi R16,34
0448 09F0 breq L99
044A ; // led1On();
044A ; goto l_setCC1100;
044A 98CF xjmp L98
044C L99:
044C L97:
044C .dbline 0 ; func end
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