📄 cc1100.s

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;          value -> R20
;           addr -> R20
	.even
_halSpiReadReg::
	xcall push_gset1
	mov R20,R16
; 	}// halRfSendPacket
; /*******************************************/	
; /*
; 	void TxCCxx00()
; 	{
; 		unsigned char	i;
; 		halSpiWriteReg(CCxxx0_FREND0, 0x10);		//CC1100:POWER=10DBM;CC2500:1DBM
; 		Dly1mS(25);;
; 		for(i=0;i<4;i++)							//发四次		
; 		{
; 	    		halRfSendPacket(txBuffer_CCxx00, sizeof(txBuffer_CCxx00));
; 			Dly1mS(50);
; 		}
; 		halSpiWriteReg(CCxxx0_FREND0, 0x15);	//CC1100太近会收不到，将发射功率降低到-10DBM //#define CCxxx0_FREND0       0x22
; 		Dly1mS(50);
; 	   	halRfSendPacket(txBuffer_CCxx00, sizeof(txBuffer_CCxx00));
; 		Dly1mS(100);
; 	}
; */
; /*********************************************************/
; 	unsigned char halSpiReadReg(unsigned char addr) 
; 	{
; 		unsigned char value;
; 	        CLEAR_CLOCK();
	xcall _CLEAR_CLOCK
; 		Dly10us();Dly10us();
	xcall _Dly10us
	xcall _Dly10us
; 		CLEAR_CSN(); // CSn=0
	xcall _CLEAR_CSN
; 		addr|=READ_SINGLE;
	ori R20,128
; 		SPI_write(addr);
	mov R16,R20
	xcall _SPI_write
; 	        CLEAR_IN();
	xcall _CLEAR_IN
; 		Dly10us();Dly10us();Dly10us();Dly10us();Dly10us();
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
; 		value=0;
	clr R20
; 		value=SPI_read();
	xcall _SPI_read
	mov R20,R16
; 		Dly10us();Dly10us();Dly10us();
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
; 		CLEAR_CLOCK();
	xcall _CLEAR_CLOCK
; 		CLEAR_IN();
	xcall _CLEAR_IN
; 		SET_CSN(); // CSn=0 P_CSn=0;
	xcall _SET_CSN
; 		return value;		
	mov R16,R20
L87:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
;          value -> R20
;              i -> R22
;          count -> R10
;         buffer -> R12,R13
;           addr -> R20
	.even
_halSpiReadBurstReg::
	xcall push_gset4
	movw R12,R18
	mov R20,R16
	ldd R10,y+8
; 	}
; /**************************************************/
; 	void halSpiReadBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count)
; 	{
; 		unsigned char i,value;
; 	        CLEAR_CLOCK();
	xcall _CLEAR_CLOCK
; 		Dly10us();Dly10us();
	xcall _Dly10us
	xcall _Dly10us
; 		CLEAR_CSN(); // CSn=0 P_CSn=0;
	xcall _CLEAR_CSN
; 		addr|=READ_BURST;
	ori R20,192
; 		SPI_write(addr);
	mov R16,R20
	xcall _SPI_write
; 		CLEAR_IN();
	xcall _CLEAR_IN
; 		Dly10us();Dly10us();Dly10us();Dly10us();Dly10us();
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
; 		value=0; 
	clr R20
; 		for(i=0;i<count;i++)
	clr R22
	xjmp L92
L89:
	xcall _SPI_read
	mov R20,R16
	mov R30,R22
	clr R31
	add R30,R12
	adc R31,R13
	std z+0,R20
L90:
	inc R22
L92:
	cp R22,R10
	brlo L89
; 		{
; 			value=SPI_read();
; 		        buffer[i]=value;
; 		}
; 		Dly10us();Dly10us();Dly10us();
	xcall _Dly10us
	xcall _Dly10us
	xcall _Dly10us
; 		CLEAR_CLOCK();
	xcall _CLEAR_CLOCK
; 		CLEAR_IN();
	xcall _CLEAR_IN
; 		SET_CSN(); // CSn=0 P_CSn=0;
	xcall _SET_CSN
L88:
	xcall pop_gset4
	.dbline 0 ; func end
	ret
;         rd_pin -> <dead>
;          value -> R22
;           addr -> R20
	.even
_halSpiReadStatus::
	xcall push_gset2
	mov R20,R16
; 	}
; /**************************************************/
; 	unsigned char halSpiReadStatus(unsigned char addr) 
; 	{
; 		unsigned char value,rd_pin;
; 	  CLEAR_CSN(); // CSn=0	P_CSn=0;
	xcall _CLEAR_CSN
L94:
L95:
; 	  while(GET_OUT());
	xcall _GET_OUT
	tst R16
	brne L94
; 		CLEAR_CLOCK(); //SCLK=0  //P_SCLK=0;
	xcall _CLEAR_CLOCK
; 		addr|=READ_BURST;
	ori R20,192
; 		SPI_write(addr);
	mov R16,R20
	xcall _SPI_write
; 		value=SPI_read();
	xcall _SPI_read
	mov R22,R16
; 		CLEAR_CLOCK(); //SCLK=0  //P_SCLK=0;
	xcall _CLEAR_CLOCK
; 		CLEAR_IN(); // SI=0 P_SI=0;
	xcall _CLEAR_IN
; 	  SET_CSN();  //CSn=1	P_CSn=1;
	xcall _SET_CSN
; 		return value;
	mov R16,R22
L93:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.even
_halRfWriteRfSettings::
; 	}// halSpiReadStatus
; /**************************************************/
; 	void halRfWriteRfSettings() 
; 	{
L98:
; 	l_setCC1100:	
; 		halSpiWriteReg(CCxxx0_FSCTRL1, 0x0C);	
	ldi R18,12
	ldi R16,11
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FSCTRL0, 0x00);	
	clr R18
	ldi R16,12
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FREQ2, 0x10);
	ldi R18,16
	ldi R16,13
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FREQ1, 0x09);
	ldi R18,9
	ldi R16,14
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FREQ0, 0x7B);
	ldi R18,123
	ldi R16,15
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_MDMCFG4, 0xC6);
	ldi R18,198
	ldi R16,16
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_MDMCFG3, 0x83); 
	ldi R18,131
	ldi R16,17
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_MDMCFG2, 0x02);
	ldi R18,2
	ldi R16,18
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_MDMCFG1, 0x22);
	ldi R18,34
	ldi R16,19
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_MDMCFG0, 0xF8);
	ldi R18,248
	ldi R16,20
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_CHANNR, 0x05);
	ldi R18,5
	ldi R16,10
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_DEVIATN, 0x30);
	ldi R18,48
	ldi R16,21
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FREND1, 0x56);
	ldi R18,86
	ldi R16,33
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FREND0, 0x10);
	ldi R18,16
	ldi R16,34
	xcall _halSpiWriteReg
; 		
; 		
; 		halSpiWriteReg(CCxxx0_MCSM0, 0x18);
	ldi R18,24
	ldi R16,24
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FOCCFG, 0x15);
	ldi R18,21
	ldi R16,25
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_BSCFG, 0x6C);
	ldi R18,108
	ldi R16,26
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_AGCCTRL2, 0x03);
	ldi R18,3
	ldi R16,27
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_AGCCTRL0, 0x91);
	ldi R18,145
	ldi R16,29
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FSCAL3, 0xA9);
	ldi R18,169
	ldi R16,35
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FSCAL2, 0x2A);
	ldi R18,42
	ldi R16,36
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FSCAL0, 0x0D);
	ldi R18,13
	ldi R16,38
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_FSTEST, 0x59);
	ldi R18,89
	ldi R16,41
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_TEST2, 0x86);
	ldi R18,134
	ldi R16,44
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_TEST1, 0x3D);
	ldi R18,61
	ldi R16,45
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_TEST0, 0x09);
	ldi R18,9
	ldi R16,46
	xcall _halSpiWriteReg
; 		
; 		
; 	  halSpiWriteReg(CCxxx0_IOCFG2, 0x24);
	ldi R18,36
	clr R16
	xcall _halSpiWriteReg
; 	  	  
; 	  halSpiWriteReg(CCxxx0_IOCFG0, 0x06);
	ldi R18,6
	ldi R16,2
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_PKTCTRL1, 0x04);
	ldi R18,4
	ldi R16,7
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_PKTCTRL0, 0x05);
	ldi R18,5
	ldi R16,8
	xcall _halSpiWriteReg
; 		halSpiWriteReg(CCxxx0_ADDR, 0x00);
	clr R18
	ldi R16,9
	xcall _halSpiWriteReg
; 		
; 		halSpiWriteReg(CCxxx0_PKTLEN, 0x1F); // hejie ,接收数据长度
	ldi R18,31
	ldi R16,6
	xcall _halSpiWriteReg
; 		//halSpiWriteReg(CCxxx0_PKTLEN, 0xFF);
; 		
; 		halSpiWriteReg(CCxxx0_MCSM2, 0x08);  // CCxxx0_MCSM2 修改限制时间　默认为０７　修改为００
	ldi R18,8
	ldi R16,22
	xcall _halSpiWriteReg
; 		//halSpiWriteReg(CCxxx0_FIFOTHR, 0x07);
; 		
; 		
; 		//CCxxx0_MCSM1
; 		//halSpiWriteReg(CCxxx0_MCSM0, 0x14);     // 状态切换时候 校准频率 。
; 		/*halSpiWriteReg(CCxxx0_FSCTRL1, 0x08);	
; 		halSpiWriteReg(CCxxx0_FSCTRL0, 0x00);	
; 		halSpiWriteReg(CCxxx0_FREQ2, 0x10);
; 		halSpiWriteReg(CCxxx0_FREQ1, 0x12);
; 		halSpiWriteReg(CCxxx0_FREQ0, 0x34);
; 		halSpiWriteReg(CCxxx0_MDMCFG4, 0xf6);
; 		halSpiWriteReg(CCxxx0_MDMCFG3, 0x75); 
; 		halSpiWriteReg(CCxxx0_MDMCFG2, 0x13);
; 		halSpiWriteReg(CCxxx0_MDMCFG1, 0x22);
; 		halSpiWriteReg(CCxxx0_MDMCFG0, 0xe5);
; 		halSpiWriteReg(CCxxx0_CHANNR, 0x00);
; 		halSpiWriteReg(CCxxx0_DEVIATN, 0x14);
; 		halSpiWriteReg(CCxxx0_FREND1, 0x56);
; 		halSpiWriteReg(CCxxx0_FREND0, 0x10);
; 		halSpiWriteReg(CCxxx0_MCSM0, 0x18);
; 		halSpiWriteReg(CCxxx0_FOCCFG, 0x16);
; 		halSpiWriteReg(CCxxx0_BSCFG, 0x6C);
; 		halSpiWriteReg(CCxxx0_AGCCTRL2, 0x03);
; 		halSpiWriteReg(CCxxx0_AGCCTRL1, 0x40);
; 		halSpiWriteReg(CCxxx0_AGCCTRL0, 0x91);
; 		halSpiWriteReg(CCxxx0_FSCAL3, 0xA9);
; 		halSpiWriteReg(CCxxx0_FSCAL2, 0x2A);
; 		halSpiWriteReg(CCxxx0_FSCAL1, 0x00);
; 		halSpiWriteReg(CCxxx0_FSCAL0, 0x11);
; 		halSpiWriteReg(CCxxx0_FSTEST, 0x59);
; 		halSpiWriteReg(CCxxx0_TEST2, 0x81);
; 		halSpiWriteReg(CCxxx0_TEST1, 0x35);
; 		halSpiWriteReg(CCxxx0_TEST0, 0x0b);
; 		halSpiWriteReg(CCxxx0_IOCFG2, 0x24);
; 		halSpiWriteReg(CCxxx0_IOCFG0, 0x06);
; 		halSpiWriteReg(CCxxx0_PKTCTRL1, 0x04);
; 		halSpiWriteReg(CCxxx0_PKTCTRL0, 0x05);
; 		halSpiWriteReg(CCxxx0_ADDR, 0x00);
; 		halSpiWriteReg(CCxxx0_PKTLEN, 0xFF);*/
; 	   
; 		if(halSpiReadReg(CCxxx0_MDMCFG1)!=0x22)
	ldi R16,19
	xcall _halSpiReadReg
	cpi R16,34
	breq L99
; 		goto l_setCC1100;
	xjmp L98
L99:
L97:
	.dbline 0 ; func end
	ret
;   packetLength -> R20
; SIG_INTERRUPT1 -> R20,R21
	.even
_TOSH_SIGNAL::
	xcall push_gset1
	movw R20,R16
	sbiw R28,1
; 	}
; /**************************************************/   
; 
;   //接收到数据中断
;   
; 	  TOSH_SIGNAL(SIG_INTERRUPT1)
; 	  {		    	    
; 		    unsigned char packetLength;		    
; 		  	packetLength = halSpiReadReg(CCxxx0_RXFIFO);		  	
	ldi R16,255
	xcall _halSpiReadReg
	mov R20,R16
; 		  	rxBuffer[0]=packetLength;		  	
	sts _rxBuffer,R20
; 		  	if(rxBuffer[0] <= 32)
	ldi R24,32
	cp R24,R16
	brlo L102
; 		    {
; 		    		halSpiReadBurstReg(CCxxx0_RXFIFO, &rxBuffer[1], packetLength);
	std y+0,R20
	ldi R18,<_rxBuffer+1
	ldi R19,>_rxBuffer+1
	ldi R16,255
	xcall _halSpiReadBurstReg
; 		    		CC1100_receive(&rxBuffer[0]);
	ldi R16,<_rxBuffer
	ldi R17,>_rxBuffer
	xcall _CC1100_receive
; 		    }
	xjmp L103
L102:
; 		    else
; 		    {
; 		    	 halSpiStrobe(CCxxx0_SFRX);
	ldi R16,58
	xcall _halSpiStrobe
; 		    }
L103:
; 		    halSpiStrobe(CCxxx0_SFRX);
	ldi R16,58
	xcall _halSpiStrobe
; 		    halSpiStrobe(CCxxx0_SRX);			   			        	  				  	    			      		  		   
	ldi R16,52
	xcall _halSpiStrobe
L101:
	adiw R28,1
	xcall pop_gset1
	.dbline 0 ; func end
	ret
;            nnn -> R20,R21
	.even
_CC1100_init::
	xcall push_gset1
	sbiw R28,1
; 	  }
; /**************************************************/ 
; 	//初始化
; 	uint8_t CC1100_init()
; 	{
; 		uint16_t nnn;
; 		SET_CSN();
	xcall _SET_CSN
; 		CLEAR_CLOCK();
	xcall _CLEAR_CLOCK
; 		CLEAR_IN();
	xcall _CLEAR_IN
; 		
; 		CC1100_setInterrupt(0x00);
	clr R16
	clr R17
	xcall _CC1100_setInterrupt
; 		CC1100_POR();
	xcall _CC1100_POR
	clr R20
	clr R21
	xjmp L109
L106:
L107:
	subi R20,255  ; offset = 1
	sbci R21,255
L109:
; 		for(nnn=0;nnn<500;nnn++);
	cpi R20,244
	ldi R30,1
	cpc R21,R30
	brlo L106
; 		halRfWriteRfSettings();
	xcall _halRfWriteRfSettings
; 		halSpiWriteBurstReg(CCxxx0_PATABLE, paTable, sizeof(paTable));
	ldi R24,8
	std y+0,R24
	ldi R18,<_paTable
	ldi R19,>_paTable
	ldi R16,62
	xcall _halSpiWriteBurstReg
; 		
; 		CC1100_setInterrupt(0x00);
	clr R16
	clr R17
	xcall _CC1100_setInterrupt
; 		CC1100_setStrobe(CCxxx0_SIDLE);
	ldi R16,54
	ldi R17,0
	xcall _CC1100_setStrobe
; 		return 1;
	ldi R16,1
L105:
	adiw R28,1
	xcall pop_gset1
	.dbline 0 ; func end
	ret
;          state -> R20
	.even
_CC1100_setStrobe::
	xcall push_gset1
	mov R20,R16
; 	} 
; 	//设置状态
; 	uint8_t CC1100_setStrobe(uint8_t state)
; 	{
; 		halSpiStrobe(state);
	mov R16,R20
	xcall _halSpiStrobe
; 		Dly1mS(5);
	ldi R16,5
	ldi R17,0
	xcall _Dly1mS
; 		return 1;
	ldi R16,1
L110:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
;          value -> R22
;        address -> R20
	.even
_CC1100_setRegister::
	xcall push_gset2
	mov R22,R18
	mov R20,R16
; 	}
; 	//写寄存器
; 	uint8_t CC1100_setRegister(uint8_t address,uint8_t value)
; 	{
; 		halSpiWriteReg(address,value);
	mov R18,R22
	mov R16,R20
	xcall _halSpiWriteReg
; 		return 1;
	ldi R16,1
L111:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
;        address -> R20
	.even
_CC1100_readRegister::
	xcall push_gset1
	mov R20,R16
; 	}
;     //读寄存器	
; 	uint8_t CC1100_readRegister(uint8_t address)
; 	{		
; 		rd_reg = halSpiReadReg(address);
	mov R16,R20
	xcall _halSpiReadReg
	sts _rd_reg,R16
; 		return rd_reg;
L112:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
;        address -> R20
	.even
_CC1100_readStatus::
	xcall push_gset1
	mov R20,R16
; 	}
; 	//读状态
; 	uint8_t CC1100_readStatus(uint8_t address)
; 	{		
; 		return halSpiReadStatus(address);
	mov R16,R20
	xcall _halSpiReadStatus
L113:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
;          count -> y+5
;         buffer -> R22,R23
;           addr -> R20
	.even
_CC1100_readBurstReg::
	xcall push_gset2
	movw R22,R18
	mov R20,R16
	sbiw R28,1
; 		
; 	}
; 	//连续读
; 	uint8_t CC1100_readBurstReg(unsigned char addr, unsigned char *buffer, unsigned char count)
; 	{		
; 		 halSpiReadBurstReg(addr, buffer, count);
	ldd R0,y+5
	std y+0,R0
	movw R18,R22
	mov R16,R20
	xcall _halSpiReadBurstReg
; 		return 1;
	ldi R16,1
L114:
	adiw R28,1
	xcall pop_gset2
	.dbline 0 ; func end
	ret
;           flag -> R20
	.even
_CC1100_setInterrupt::
	xcall push_gset1
	mov R20,R16
; 	}
; 	//halSpiReadStatus
; 	//设置中断
; 	uint8_t CC1100_setInterrupt(uint8_t flag)
; 	{
; 		if(flag==0x00)
	tst R20
	brne L116
; 		{
; 			EIFR=0x02;EICRA=0x08;EICRB=0x00;EIMSK=0x00;
	ldi R24,2
	out 0x38,R24
	ldi R24,8
	sts 106,R24
	clr R2
	out 0x3a,R2
	out 0x39,R2
; 		}
	xjmp L117
L116:
; 		else if(flag==0x01)
	cpi R20,1
	brne L118
; 		{
; 			EIFR=0x02;EICRA=0x08;EICRB=0x00;EIMSK=0x02;
	ldi R24,2
	out 0x38,R24
	ldi R24,8
	sts 106,R24
	clr R2
	out 0x3a,R2
	ldi R24,2
	out 0x39,R24
; 			halSpiStrobe(CCxxx0_SRX);
	ldi R16,52
	xcall _halSpiStrobe
; 		}
	xjmp L119
L118:
; 		else if(flag==0x02)
	cpi R20,2
	brne L120
; 		{
; 			halSpiStrobe(CCxxx0_SRX); 
	ldi R16,52
	xcall _halSpiStrobe
; 		}		
L120:
L119:
L117:
; 		return 1;
	ldi R16,1
L115:
	xcall pop_gset1
	.dbline 0 ; func end
	ret
;           size -> R22
;          txPtr -> R20,R21
	.even
_CC1100_sendRFburst::
	xcall push_gset2
	mov R22,R18
	movw R20,R16
; 	}
; 	//连续发
; 	uint8_t CC1100_sendRFburst(uint8_t *txPtr,uint8_t size)
; 	{
; 		CC1100_setInterrupt(0x00); //关中断
	clr R16
	xcall _CC1100_setInterrupt
; 		halSpiStrobe(CCxxx0_SIDLE);
	ldi R16,54
	xcall _halSpiStrobe
; 	   	halRfSendPacket(txPtr, size);
	mov R18,R22
	movw R16,R20
	xcall _halRfSendPacket
; 		//Dly1mS(100);
; 		if(SEND_DONE==0x01) //表明发送完成
	lds R24,_SEND_DONE
	cpi R24,1
	brne L123
; 		{
; 			SEND_DONE=0x00;
	clr R2
	sts _SEND_DONE,R2
; 			CC1100_sendDone(1);
	ldi R16,1
	ldi R17,0
	xcall _CC1100_sendDone
; 			CC1100_setInterrupt(0x01); //开中断
	ldi R16,1
	xcall _CC1100_setInterrupt
; 		}
L123:
; 		return 1;
	ldi R16,1
L122:
	xcall pop_gset2
	.dbline 0 ; func end
	ret
	.area bss(ram, con, rel)
_rd_reg::
	.blkb 1
_rxBuffer::
	.blkb 32
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#mega #128
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