main_frame.lst
来自「mega128平台下」· LST 代码 · 共 2,086 行 · 第 1/5 页
LST
2,086 行
03EF 9AAA SBI 0x15,2
03F0 940E0DE4 CALL pop_gset5
03F2 9508 RET
_CC1100_POR:
i --> R20
03F3 940E0DEF CALL push_gset1
03F5 E306 LDI R16,0x36
03F6 DFAF RCALL _halSpiStrobe
03F7 9AAA SBI 0x15,2
03F8 2744 CLR R20
03F9 2755 CLR R21
03FA C002 RJMP _SET_CLOCK
03FB 5F4F SUBI R20,0xFF
03FC 4F5F SBCI R21,0xFF
_SET_CLOCK:
03FD 3644 CPI R20,0x64
03FE E0E0 LDI R30,0
03FF 075E CPC R21,R30
0400 F3D0 BCS 0x03FB
0401 98AA CBI 0x15,2
0402 2744 CLR R20
_CLEAR_CLOCK:
0403 2755 CLR R21
0404 C002 RJMP 0x0407
0405 5F4F SUBI R20,0xFF
0406 4F5F SBCI R21,0xFF
0407 3644 CPI R20,0x64
0408 E0E0 LDI R30,0
_SET_IN:
0409 075E CPC R21,R30
040A F3D0 BCS 0x0405
040B 9AAA SBI 0x15,2
040C 2744 CLR R20
040D 2755 CLR R21
040E C002 RJMP 0x0411
_CLEAR_IN:
040F 5F4F SUBI R20,0xFF
0410 4F5F SBCI R21,0xFF
0411 3D40 CPI R20,0xD0
0412 E0E7 LDI R30,7
0413 075E CPC R21,R30
0414 F3D0 BCS 0x040F
_SET_CSN:
0415 98AA CBI 0x15,2
0416 DE9E RCALL _GET_OUT
_CLEAR_CSN:
0417 3000 CPI R16,0
0418 0701 CPC R16,R17
0419 F7E1 BNE 0x0416
041A E300 LDI R16,0x30
041B DF8A RCALL _halSpiStrobe
041C 91800065 LDS R24,0x65
041E 7F8E ANDI R24,0xFE
041F 93800065 STS 0x65,R24
0421 91800065 LDS R24,0x65
0423 7F8D ANDI R24,0xFD
0424 93800065 STS 0x65,R24
0426 9AAA SBI 0x15,2
0427 940E0DF2 CALL pop_gset1
0429 9508 RET
_halRfSendPacket:
size --> R22
txBuffer --> R20
042A 940E0DED CALL push_gset2
042C 2F62 MOV R22,R18
042D 01A8 MOVW R20,R16
042E 9721 SBIW R28,1
042F E30B LDI R16,0x3B
0430 DF75 RCALL _halSpiStrobe
0431 E00F LDI R16,0xF
0432 E010 LDI R17,0
0433 DEA4 RCALL _Dly1mS
0434 8368 STD Y+0,R22
0435 019A MOVW R18,R20
0436 E70F LDI R16,0x7F
0437 DF8B RCALL _halSpiWriteBurstReg
0438 E00F LDI R16,0xF
0439 E010 LDI R17,0
043A DE9D RCALL _Dly1mS
043B E305 LDI R16,0x35
043C DF69 RCALL _halSpiStrobe
043D C003 RJMP 0x0441
043E E001 LDI R16,1
043F E010 LDI R17,0
0440 DE97 RCALL _Dly1mS
0441 DF26 RCALL _spiGetRxTxStatus
0442 2F80 MOV R24,R16
0443 7780 ANDI R24,0x70
0444 F7C9 BNE 0x043E
0445 E081 LDI R24,1
0446 9380010C STS SEND_DONE,R24
0448 2700 CLR R16
0449 9621 ADIW R28,1
044A 940E0DDB CALL pop_gset2
044C 9508 RET
_halSpiReadReg:
value --> R20
addr --> R20
044D 940E0DEF CALL push_gset1
044F 2F40 MOV R20,R16
0450 91800065 LDS R24,0x65
0452 7F8E ANDI R24,0xFE
0453 93800065 STS 0x65,R24
0455 DE72 RCALL _Dly10us
0456 DE71 RCALL _Dly10us
0457 98AA CBI 0x15,2
0458 6840 ORI R20,0x80
0459 2F04 MOV R16,R20
045A DE9C RCALL _SPI_write
045B 91800065 LDS R24,0x65
045D 7F8D ANDI R24,0xFD
045E 93800065 STS 0x65,R24
0460 DE67 RCALL _Dly10us
0461 DE66 RCALL _Dly10us
0462 DE65 RCALL _Dly10us
0463 DE64 RCALL _Dly10us
0464 DE63 RCALL _Dly10us
0465 2744 CLR R20
0466 DED2 RCALL _SPI_read
0467 2F40 MOV R20,R16
0468 DE5F RCALL _Dly10us
0469 DE5E RCALL _Dly10us
046A DE5D RCALL _Dly10us
046B 91800065 LDS R24,0x65
046D 7F8E ANDI R24,0xFE
046E 93800065 STS 0x65,R24
0470 91800065 LDS R24,0x65
0472 7F8D ANDI R24,0xFD
0473 93800065 STS 0x65,R24
0475 9AAA SBI 0x15,2
0476 2F04 MOV R16,R20
0477 940E0DF2 CALL pop_gset1
0479 9508 RET
_halSpiReadBurstReg:
value --> R20
i --> R22
count --> R10
buffer --> R12
addr --> R20
047A 940E0DE9 CALL push_gset4
047C 0169 MOVW R12,R18
047D 2F40 MOV R20,R16
047E 84A8 LDD R10,Y+8
047F 91800065 LDS R24,0x65
0481 7F8E ANDI R24,0xFE
0482 93800065 STS 0x65,R24
0484 DE43 RCALL _Dly10us
0485 DE42 RCALL _Dly10us
0486 98AA CBI 0x15,2
0487 6C40 ORI R20,0xC0
0488 2F04 MOV R16,R20
0489 DE6D RCALL _SPI_write
048A 91800065 LDS R24,0x65
048C 7F8D ANDI R24,0xFD
048D 93800065 STS 0x65,R24
048F DE38 RCALL _Dly10us
0490 DE37 RCALL _Dly10us
0491 DE36 RCALL _Dly10us
0492 DE35 RCALL _Dly10us
0493 DE34 RCALL _Dly10us
0494 2744 CLR R20
0495 2766 CLR R22
0496 C008 RJMP 0x049F
0497 DEA1 RCALL _SPI_read
0498 2F40 MOV R20,R16
0499 2FE6 MOV R30,R22
049A 27FF CLR R31
049B 0DEC ADD R30,R12
049C 1DFD ADC R31,R13
049D 8340 STD Z+0,R20
049E 9563 INC R22
049F 156A CP R22,R10
04A0 F3B0 BCS 0x0497
04A1 DE26 RCALL _Dly10us
04A2 DE25 RCALL _Dly10us
04A3 DE24 RCALL _Dly10us
04A4 91800065 LDS R24,0x65
04A6 7F8E ANDI R24,0xFE
04A7 93800065 STS 0x65,R24
04A9 91800065 LDS R24,0x65
04AB 7F8D ANDI R24,0xFD
04AC 93800065 STS 0x65,R24
04AE 9AAA SBI 0x15,2
04AF 940E0DE1 CALL pop_gset4
04B1 9508 RET
_halSpiReadStatus:
rd_pin --> Y+1
value --> R20
addr --> R22
04B2 940E0DED CALL push_gset2
04B4 2F40 MOV R20,R16
04B5 98AA CBI 0x15,2
04B6 DDFE RCALL _GET_OUT
04B7 3000 CPI R16,0
04B8 0701 CPC R16,R17
04B9 F7E1 BNE 0x04B6
04BA 91800065 LDS R24,0x65
04BC 7F8E ANDI R24,0xFE
04BD 93800065 STS 0x65,R24
04BF 6C40 ORI R20,0xC0
04C0 2F04 MOV R16,R20
04C1 DE35 RCALL _SPI_write
04C2 DE76 RCALL _SPI_read
04C3 2F60 MOV R22,R16
04C4 91800065 LDS R24,0x65
04C6 7F8E ANDI R24,0xFE
04C7 93800065 STS 0x65,R24
04C9 91800065 LDS R24,0x65
04CB 7F8D ANDI R24,0xFD
04CC 93800065 STS 0x65,R24
04CE 9AAA SBI 0x15,2
04CF 940E0DDB CALL pop_gset2
04D1 9508 RET
_halRfWriteRfSettings:
04D2 E02C LDI R18,0xC
04D3 E00B LDI R16,0xB
04D4 DEB0 RCALL _halSpiWriteReg
04D5 2722 CLR R18
04D6 E00C LDI R16,0xC
04D7 DEAD RCALL _halSpiWriteReg
04D8 E120 LDI R18,0x10
04D9 E00D LDI R16,0xD
04DA DEAA RCALL _halSpiWriteReg
04DB E029 LDI R18,0x9
04DC E00E LDI R16,0xE
04DD DEA7 RCALL _halSpiWriteReg
04DE E72B LDI R18,0x7B
04DF E00F LDI R16,0xF
04E0 DEA4 RCALL _halSpiWriteReg
04E1 EC26 LDI R18,0xC6
04E2 E100 LDI R16,0x10
04E3 DEA1 RCALL _halSpiWriteReg
04E4 E823 LDI R18,0x83
04E5 E101 LDI R16,0x11
04E6 DE9E RCALL _halSpiWriteReg
04E7 E022 LDI R18,2
04E8 E102 LDI R16,0x12
04E9 DE9B RCALL _halSpiWriteReg
04EA E222 LDI R18,0x22
04EB E103 LDI R16,0x13
04EC DE98 RCALL _halSpiWriteReg
04ED EF28 LDI R18,0xF8
04EE E104 LDI R16,0x14
04EF DE95 RCALL _halSpiWriteReg
04F0 E02A LDI R18,0xA
04F1 E00A LDI R16,0xA
04F2 DE92 RCALL _halSpiWriteReg
04F3 E320 LDI R18,0x30
04F4 E105 LDI R16,0x15
04F5 DE8F RCALL _halSpiWriteReg
04F6 E526 LDI R18,0x56
04F7 E201 LDI R16,0x21
04F8 DE8C RCALL _halSpiWriteReg
04F9 E120 LDI R18,0x10
04FA E202 LDI R16,0x22
04FB DE89 RCALL _halSpiWriteReg
04FC E128 LDI R18,0x18
04FD E108 LDI R16,0x18
04FE DE86 RCALL _halSpiWriteReg
04FF E125 LDI R18,0x15
0500 E109 LDI R16,0x19
0501 DE83 RCALL _halSpiWriteReg
0502 E62C LDI R18,0x6C
0503 E10A LDI R16,0x1A
0504 DE80 RCALL _halSpiWriteReg
0505 E023 LDI R18,3
0506 E10B LDI R16,0x1B
0507 DE7D RCALL _halSpiWriteReg
0508 E921 LDI R18,0x91
0509 E10D LDI R16,0x1D
050A DE7A RCALL _halSpiWriteReg
050B EA29 LDI R18,0xA9
050C E203 LDI R16,0x23
050D DE77 RCALL _halSpiWriteReg
050E E22A LDI R18,0x2A
050F E204 LDI R16,0x24
0510 DE74 RCALL _halSpiWriteReg
0511 E02D LDI R18,0xD
0512 E206 LDI R16,0x26
0513 DE71 RCALL _halSpiWriteReg
0514 E529 LDI R18,0x59
0515 E209 LDI R16,0x29
0516 DE6E RCALL _halSpiWriteReg
0517 E826 LDI R18,0x86
0518 E20C LDI R16,0x2C
0519 DE6B RCALL _halSpiWriteReg
051A E32D LDI R18,0x3D
051B E20D LDI R16,0x2D
051C DE68 RCALL _halSpiWriteReg
051D E029 LDI R18,0x9
051E E20E LDI R16,0x2E
051F DE65 RCALL _halSpiWriteReg
0520 E224 LDI R18,0x24
0521 2700 CLR R16
0522 DE62 RCALL _halSpiWriteReg
0523 E026 LDI R18,6
0524 E002 LDI R16,2
0525 DE5F RCALL _halSpiWriteReg
0526 E024 LDI R18,4
0527 E007 LDI R16,7
0528 DE5C RCALL _halSpiWriteReg
0529 E025 LDI R18,5
052A E008 LDI R16,0x8
052B DE59 RCALL _halSpiWriteReg
052C 2722 CLR R18
052D E009 LDI R16,0x9
052E DE56 RCALL _halSpiWriteReg
052F E12F LDI R18,0x1F
0530 E006 LDI R16,6
0531 DE53 RCALL _halSpiWriteReg
0532 E028 LDI R18,0x8
0533 E106 LDI R16,0x16
0534 DE50 RCALL _halSpiWriteReg
0535 E103 LDI R16,0x13
0536 DF16 RCALL _halSpiReadReg
0537 3202 CPI R16,0x22
0538 F009 BEQ 0x053A
0539 CF98 RJMP _halRfWriteRfSettings
053A 9508 RET
_cc1100_rx_isr:
packetLength --> R20
053B 940E0E34 CALL push_lset
053D 940E0DEF CALL push_gset1
053F 9721 SBIW R28,1
0540 EF0F LDI R16,0xFF
0541 DF0B RCALL _halSpiReadReg
0542 2F40 MOV R20,R16
0543 9340015E STS rxBuffer,R20
0545 E280 LDI R24,0x20
0546 1780 CP R24,R16
0547 F050 BCS 0x0552
0548 8348 STD Y+0,R20
0549 E52F LDI R18,0x5F
054A E031 LDI R19,1
054B EF0F LDI R16,0xFF
054C DF2D RCALL _halSpiReadBurstReg
054D E80C LDI R16,0x8C
054E E010 LDI R17,0
054F 940E0679 CALL _post
0551 C002 RJMP 0x0554
0552 E30A LDI R16,0x3A
0553 DE52 RCALL _halSpiStrobe
0554 E30A LDI R16,0x3A
0555 DE50 RCALL _halSpiStrobe
0556 E304 LDI R16,0x34
0557 DE4E RCALL _halSpiStrobe
0558 9621 ADIW R28,1
0559 940E0DF2 CALL pop_gset1
055B 940E0E4B CALL pop_lset
055D 9518 RETI
_CC1100_init:
nnn --> R20
055E 940E0DEF CALL push_gset1
0560 9721 SBIW R28,1
0561 9AAA SBI 0x15,2
0562 91800065 LDS R24,0x65
0564 7F8E ANDI R24,0xFE
0565 93800065 STS 0x65,R24
0567 91800065 LDS R24,0x65
0569 7F8D ANDI R24,0xFD
056A 93800065 STS 0x65,R24
056C 2700 CLR R16
056D 2711 CLR R17
056E D054 RCALL _CC1100_setInterrupt
056F DE83 RCALL _CC1100_POR
0570 2744 CLR R20
0571 2755 CLR R21
0572 C002 RJMP 0x0575
0573 5F4F SUBI R20,0xFF
0574 4F5F SBCI R21,0xFF
0575 3F44 CPI R20,0xF4
0576 E0E1 LDI R30,1
0577 075E CPC R21,R30
0578 F3D0 BCS 0x0573
0579 DF58 RCALL _halRfWriteRfSettings
057A E088 LDI R24,0x8
057B 8388 STD Y+0,R24
057C E024 LDI R18,4
057D E031 LDI R19,1
057E E30E LDI R16,0x3E
057F DE43 RCALL _halSpiWriteBurstReg
0580 2700 CLR R16
0581 2711 CLR R17
0582 D040 RCALL _CC1100_setInterrupt
0583 E306 LDI R16,0x36
0584 E010 LDI R17,0
0585 D005 RCALL _CC1100_setStrobe
0586 E001 LDI R16,1
0587 9621 ADIW R28,1
0588 940E0DF2 CALL pop_gset1
058A 9508 RET
_CC1100_setStrobe:
state --> R20
058B 940E0DEF CALL push_gset1
058D 2F40 MOV R20,R16
058E 2F04 MOV R16,R20
058F DE16 RCALL _halSpiStrobe
0590 E005 LDI R16,5
0591 E010 LDI R17,0
0592 DD45 RCALL _Dly1mS
0593 E001 LDI R16,1
0594 940E0DF2 CALL pop_gset1
0596 9508 RET
_CC1100_setRegister:
value --> R22
address --> R20
0597 940E0DED CALL push_gset2
0599 2F62 MOV R22,R18
059A 2F40 MOV R20,R16
059B 2F26 MOV R18,R22
059C 2F04 MOV R16,R20
059D DDE7 RCALL _halSpiWriteReg
059E E001 LDI R16,1
059F 940E0DDB CALL pop_gset2
05A1 9508 RET
_CC1100_readRegister:
address --> R20
05A2 940E0DEF CALL push_gset1
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