cinit.s

《OSEK/VDX汽车电子嵌入式软件编程技术》中光盘的资料

;#************************************************************************
;#
;#	$Copyright    2001 Joseph J. Lemieux  ALL RIGHTS RESERVED. $
;#
;#	$Filename: C:\OSEKBook\src\CH01\src\cinit.s $
;#
;#   PURPOSE: Initialization of memory to 0, then initialization of C 
;#			variables.
;#
;#************************************************************************
	.extern _RAM_START
	.extern  _CpyDstBeg,_CpyDstEnd,_CpySrcBeg

	.text
	.globl InitRAM,cinit
;#-------------------------------------------------------------------------
;#
;# InitRAM - Initialize RAM to 0. This must be called before any
;# RAM variables are initialized and the stack is empty
;#
;#-------------------------------------------------------------------------
InitRAM:
	li	r3,0
	lis	r4,%hiadj(_RAM_BEGIN)	# RAM_BEGIN and RAM_END are defined by the
	addi	r4,r4,%lo(_RAM_BEGIN)    # linker to point to the start and end of
	lis	r5,%hiadj(_RAM_END)      # non-stack memory
	addi	r5,r5,%lo(_RAM_END)
	li	r6,4                     # variable for rapid calculation
ClearRAM:
	stw	r3,0(r4)                 # zero memory
	add	r4,r4,r6                 # update pointer
	sub.	r7,r5,r4                 # Check for completion
	bne	cr0,ClearRAM		
	blr

;#-------------------------------------------------------------------------
;#
;# cinit - Initialize C variables
;#
;#-------------------------------------------------------------------------

cinit:
	lis	r4,%hiadj(__DATA_ROM)    # DATA_ROM is start of ROM based copy of variables
	addi	r4,r4,%lo(__DATA_ROM)  
	lis	r5,%hiadj(__DATA_RAM)    # DATA_RAM and DATA_END is the area in RAM where
	addi	r5,r5,%lo(__DATA_RAM)    # initialized variables are stored.
	lis	r6,%hiadj(__DATA_END)
	addi	r6,r6,%lo(__DATA_END)
	sub.	r6,r6,r5                 # Calculate size
	beq	cr0,cinit_end            # Skip if nothing to copy
	li	r7,4                     # Variable for rapid calculation
cinit_loop:
	lwz	r3,0(r4)                 # Copy data
	stw	r3,0(r5)
	add	r4,r4,r7                 # Update pointers
	add	r5,r5,r7
	sub.	r6,r6,r7
	bne	cr0,cinit_loop           # Repeat until done
cinit_end:
	blr
	.end