map.xmsgs

来自「本实例是学习fpga的入门程序 希望大家喜欢」· XMSGS 代码 · 共 25 行

<?xml version="1.0" encoding="UTF-8"?>
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<messages>
<msg type="info" file="MapLib" num="562" delta="unknown" >No environment variables are currently set.
</msg>

<msg type="info" file="MapLib" num="863" delta="unknown" >The following Virtex BUFG(s) is/are being retargeted to Virtex2 BUFGMUX(s) with input tied to I0 and Select pin tied to constant 0:
<arg fmt="%s" index="1">BUFG symbol &quot;clk200hztop/CLK0_BUFG_INST&quot; (output signal=CLK0_OUT),
BUFG symbol &quot;clk200hztop/CLK2X_BUFG_INST&quot; (output signal=CLK2X_OUT),
BUFG symbol &quot;data_value_cmp_eq0000_BUFG&quot; (output signal=data_value_cmp_eq0000)</arg>
</msg>

<msg type="info" file="LIT" num="244" delta="unknown" >All of the single ended outputs in this design are using slew rate limited output drivers. The delay on speed critical single ended outputs can be dramatically reduced by designating them as fast outputs in the schematic.
</msg>

<msg type="warning" file="PhysDesignRules" num="1054" delta="unknown" >The DCM comp <arg fmt="%s" index="1">clk200hztop/DCM_INST</arg> is configured with CLK2X to CLKFB programming. Feedback of the CLK2X signal may not be supported on some Spartan 3 silicon. Please check the Spartan 3 Errata for details.
</msg>

</messages>