fifo_1.map.rpt

在quartus开发环境下

+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated|a_dpfifo_b401:dpfifo|dpram_0it:FIFOram|altsyncram_urj1:altsyncram2 ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                           ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                            ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: lpm_fifo0:inst|scfifo:scfifo_component ;
+-------------------------+------------+----------------------------------------------+
; Parameter Name          ; Value      ; Type                                         ;
+-------------------------+------------+----------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON         ; AUTO_CARRY                                   ;
; IGNORE_CARRY_BUFFERS    ; OFF        ; IGNORE_CARRY                                 ;
; AUTO_CASCADE_CHAINS     ; ON         ; AUTO_CASCADE                                 ;
; IGNORE_CASCADE_BUFFERS  ; OFF        ; IGNORE_CASCADE                               ;
; lpm_width               ; 8          ; Signed Integer                               ;
; LPM_NUMWORDS            ; 8          ; Signed Integer                               ;
; LPM_WIDTHU              ; 3          ; Signed Integer                               ;
; LPM_SHOWAHEAD           ; OFF        ; Untyped                                      ;
; UNDERFLOW_CHECKING      ; ON         ; Untyped                                      ;
; OVERFLOW_CHECKING       ; ON         ; Untyped                                      ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF        ; Untyped                                      ;
; ADD_RAM_OUTPUT_REGISTER ; OFF        ; Untyped                                      ;
; ALMOST_FULL_VALUE       ; 0          ; Untyped                                      ;
; ALMOST_EMPTY_VALUE      ; 0          ; Untyped                                      ;
; USE_EAB                 ; ON         ; Untyped                                      ;
; MAXIMIZE_SPEED          ; 5          ; Untyped                                      ;
; DEVICE_FAMILY           ; Cyclone II ; Untyped                                      ;
; OPTIMIZE_FOR_SPEED      ; 5          ; Untyped                                      ;
; CBXI_PARAMETER          ; scfifo_4uv ; Untyped                                      ;
+-------------------------+------------+----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------+
; scfifo Parameter Settings by Entity Instance                        ;
+----------------------------+----------------------------------------+
; Name                       ; Value                                  ;
+----------------------------+----------------------------------------+
; Number of entity instances ; 1                                      ;
; Entity Instance            ; lpm_fifo0:inst|scfifo:scfifo_component ;
;     -- FIFO Type           ; Single Clock                           ;
;     -- lpm_width           ; 8                                      ;
;     -- LPM_NUMWORDS        ; 8                                      ;
;     -- LPM_SHOWAHEAD       ; OFF                                    ;
;     -- USE_EAB             ; ON                                     ;
+----------------------------+----------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Fri Apr 06 10:47:14 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off FIFO_1 -c FIFO_1
Info: Found 1 design units, including 1 entities, in source file FIFO_1.bdf
    Info: Found entity 1: FIFO_1
Info: Elaborating entity "FIFO_1" for the top level hierarchy
Warning: Using design file lpm_fifo0.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: lpm_fifo0-SYN
    Info: Found entity 1: lpm_fifo0
Info: Elaborating entity "lpm_fifo0" for hierarchy "lpm_fifo0:inst"
Info: Found 1 design units, including 1 entities, in source file e:/altera/quartus ii7.0/quartus/libraries/megafunctions/scfifo.tdf
    Info: Found entity 1: scfifo
Info: Elaborating entity "scfifo" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component"
Info: Elaborated megafunction instantiation "lpm_fifo0:inst|scfifo:scfifo_component"
Info: Found 1 design units, including 1 entities, in source file db/scfifo_4uv.tdf
    Info: Found entity 1: scfifo_4uv
Info: Elaborating entity "scfifo_4uv" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/a_dpfifo_b401.tdf
    Info: Found entity 1: a_dpfifo_b401
Info: Elaborating entity "a_dpfifo_b401" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated|a_dpfifo_b401:dpfifo"
Info: Found 1 design units, including 1 entities, in source file db/a_fefifo_m4f.tdf
    Info: Found entity 1: a_fefifo_m4f
Info: Elaborating entity "a_fefifo_m4f" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated|a_dpfifo_b401:dpfifo|a_fefifo_m4f:fifo_state"
Info: Found 1 design units, including 1 entities, in source file db/cntr_oj7.tdf
    Info: Found entity 1: cntr_oj7
Info: Elaborating entity "cntr_oj7" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated|a_dpfifo_b401:dpfifo|a_fefifo_m4f:fifo_state|cntr_oj7:count_usedw"
Info: Found 1 design units, including 1 entities, in source file db/dpram_0it.tdf
    Info: Found entity 1: dpram_0it
Info: Elaborating entity "dpram_0it" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated|a_dpfifo_b401:dpfifo|dpram_0it:FIFOram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_urj1.tdf
    Info: Found entity 1: altsyncram_urj1
Info: Elaborating entity "altsyncram_urj1" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated|a_dpfifo_b401:dpfifo|dpram_0it:FIFOram|altsyncram_urj1:altsyncram2"
Info: Found 1 design units, including 1 entities, in source file db/cntr_cjb.tdf
    Info: Found entity 1: cntr_cjb
Info: Elaborating entity "cntr_cjb" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_4uv:auto_generated|a_dpfifo_b401:dpfifo|cntr_cjb:rd_ptr_count"
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning
    Info: Allocated 146 megabytes of memory during processing
    Info: Processing ended: Fri Apr 06 10:47:20 2007
    Info: Elapsed time: 00:00:06
Info: *******************************************************************
Info: Running Quartus II Partition Merge
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Fri Apr 06 10:47:21 2007
Info: Implemented 48 device resources after synthesis - the final resource count might be different
    Info: Implemented 11 input pins
    Info: Implemented 13 output pins
    Info: Implemented 16 logic cells
    Info: Implemented 8 RAM segments
Info: Quartus II Partition Merge was successful. 0 errors, 0 warnings
    Info: Processing ended: Fri Apr 06 10:47:22 2007
    Info: Elapsed time: 00:00:01