scfifo_4uv.tdf

在quartus开发环境下

--scfifo ADD_RAM_OUTPUT_REGISTER="OFF" DEVICE_FAMILY="Cyclone II" LPM_NUMWORDS=8 LPM_SHOWAHEAD="OFF" lpm_width=8 lpm_widthu=3 OPTIMIZE_FOR_SPEED=5 OVERFLOW_CHECKING="ON" UNDERFLOW_CHECKING="ON" USE_EAB="ON" clock data empty full q rdreq usedw wrreq CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 CYCLONEII_M4K_COMPATIBILITY="ON" LOW_POWER_MODE="AUTO"
--VERSION_BEGIN 7.0 cbx_altdpram 2006:11:03:15:22:16:SJ cbx_altsyncram 2007:01:25:14:36:16:SJ cbx_cycloneii 2006:09:29:19:03:26:SJ cbx_fifo_common 2006:03:14:10:59:42:SJ cbx_lpm_add_sub 2006:10:10:22:03:24:SJ cbx_lpm_compare 2006:04:25:14:54:12:SJ cbx_lpm_counter 2006:11:07:16:43:46:SJ cbx_lpm_decode 2006:04:25:15:10:18:SJ cbx_lpm_mux 2006:04:25:15:10:08:SJ cbx_mgl 2006:10:27:16:08:48:SJ cbx_scfifo 2006:10:16:20:17:00:SJ cbx_stratix 2006:09:18:10:47:42:SJ cbx_stratixii 2006:10:13:14:01:30:SJ cbx_stratixiii 2006:10:19:19:28:28:SJ cbx_util_mgl 2006:11:03:10:32:30:SJ  VERSION_END


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--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
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--  without limitation, that your use is for the sole purpose of 
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FUNCTION a_dpfifo_b401 (clock, data[7..0], rreq, sclr, wreq)
RETURNS ( empty, full, q[7..0], usedw[2..0]);

--synthesis_resources = reg 2 
SUBDESIGN scfifo_4uv
( 
	clock	:	input;
	data[7..0]	:	input;
	empty	:	output;
	full	:	output;
	q[7..0]	:	output;
	rdreq	:	input;
	usedw[2..0]	:	output;
	wrreq	:	input;
) 
VARIABLE 
	dpfifo : a_dpfifo_b401;
	sclr	: NODE;

BEGIN 
	dpfifo.clock = clock;
	dpfifo.data[] = data[];
	dpfifo.rreq = rdreq;
	dpfifo.sclr = sclr;
	dpfifo.wreq = wrreq;
	empty = dpfifo.empty;
	full = dpfifo.full;
	q[] = dpfifo.q[];
	sclr = GND;
	usedw[] = dpfifo.usedw[];
END;
--VALID FILE