rs_1.tan.qmsg

在quartus开发环境下

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun May 27 16:51:25 2007 " "Info: Processing started: Sun May 27 16:51:25 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off RS_1 -c RS_1 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off RS_1 -c RS_1 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WTDB_ANALYZE_COMB_LATCHES" "" "Warning: Timing Analysis is analyzing one or more combinational loops as latches" { { "Warning" "WTDB_COMB_LATCH_NODE" "inst " "Warning: Node \"inst\" is a latch" {  } { { "RS_1.bdf" "" { Schematic "D:/my_eda/RS/RS_1.bdf" { { 96 288 352 144 "inst" "" } } } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0}  } {  } 0 0 "Timing Analysis is analyzing one or more combinational loops as latches" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "R Qn 10.998 ns Longest " "Info: Longest tpd from source pin \"R\" to destination pin \"Qn\" is 10.998 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.945 ns) 0.945 ns R 1 PIN PIN_24 2 " "Info: 1: + IC(0.000 ns) + CELL(0.945 ns) = 0.945 ns; Loc. = PIN_24; Fanout = 2; PIN Node = 'R'" {  } { { "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { R } "NODE_NAME" } } { "RS_1.bdf" "" { Schematic "D:/my_eda/RS/RS_1.bdf" { { 224 72 240 240 "R" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.293 ns) + CELL(0.651 ns) 6.889 ns inst1 2 COMB LCCOMB_X1_Y8_N28 1 " "Info: 2: + IC(5.293 ns) + CELL(0.651 ns) = 6.889 ns; Loc. = LCCOMB_X1_Y8_N28; Fanout = 1; COMB Node = 'inst1'" {  } { { "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "5.944 ns" { R inst1 } "NODE_NAME" } } { "RS_1.bdf" "" { Schematic "D:/my_eda/RS/RS_1.bdf" { { 200 288 352 248 "inst1" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.053 ns) + CELL(3.056 ns) 10.998 ns Qn 3 PIN PIN_28 0 " "Info: 3: + IC(1.053 ns) + CELL(3.056 ns) = 10.998 ns; Loc. = PIN_28; Fanout = 0; PIN Node = 'Qn'" {  } { { "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "4.109 ns" { inst1 Qn } "NODE_NAME" } } { "RS_1.bdf" "" { Schematic "D:/my_eda/RS/RS_1.bdf" { { 216 416 592 232 "Qn" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.652 ns ( 42.30 % ) " "Info: Total cell delay = 4.652 ns ( 42.30 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.346 ns ( 57.70 % ) " "Info: Total interconnect delay = 6.346 ns ( 57.70 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "10.998 ns" { R inst1 Qn } "NODE_NAME" } } { "e:/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/70/quartus/bin/Technology_Viewer.qrui" "10.998 ns" { R R~combout inst1 Qn } { 0.000ns 0.000ns 5.293ns 1.053ns } { 0.000ns 0.945ns 0.651ns 3.056ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 2 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "103 " "Info: Allocated 103 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun May 27 16:51:27 2007 " "Info: Processing ended: Sun May 27 16:51:27 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}