yb_cnt4.tan.qmsg

在quartus开发环境下

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version " "Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 12 20:59:46 2007 " "Info: Processing started: Mon Mar 12 20:59:46 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off yb_cnt4 -c yb_cnt4 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off yb_cnt4 -c yb_cnt4 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" {  } { { "yb_cnt4.bdf" "" { Schematic "D:/my_eda/yb_cnt4/yb_cnt4.bdf" { { 200 -176 -8 216 "clk" "" } } } } { "e:/altera60/quartus60/win/Assignment Editor.qase" "" { Assignment "e:/altera60/quartus60/win/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "3 " "Warning: Found 3 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "inst " "Info: Detected ripple clock \"inst\" as buffer" {  } { { "yb_cnt4.bdf" "" { Schematic "D:/my_eda/yb_cnt4/yb_cnt4.bdf" { { 168 24 88 248 "inst" "" } } } } { "e:/altera60/quartus60/win/Assignment Editor.qase" "" { Assignment "e:/altera60/quartus60/win/Assignment Editor.qase" 1 { { 0 "inst" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "inst2 " "Info: Detected ripple clock \"inst2\" as buffer" {  } { { "yb_cnt4.bdf" "" { Schematic "D:/my_eda/yb_cnt4/yb_cnt4.bdf" { { 168 184 248 248 "inst2" "" } } } } { "e:/altera60/quartus60/win/Assignment Editor.qase" "" { Assignment "e:/altera60/quartus60/win/Assignment Editor.qase" 1 { { 0 "inst2" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "inst4 " "Info: Detected ripple clock \"inst4\" as buffer" {  } { { "yb_cnt4.bdf" "" { Schematic "D:/my_eda/yb_cnt4/yb_cnt4.bdf" { { 176 344 408 256 "inst4" "" } } } } { "e:/altera60/quartus60/win/Assignment Editor.qase" "" { Assignment "e:/altera60/quartus60/win/Assignment Editor.qase" 1 { { 0 "inst4" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}