decoder3_8_1.map.summary

在quartus开发环境下

Analysis & Synthesis Status : Successful - Sat Mar 03 14:26:43 2007
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : decoder3_8_1
Top-level Entity Name : decoder3_8_1
Family : Cyclone II
Total logic elements : 9
Total registers : 0
Total pins : 14
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0