📄 add.qsf
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# Copyright (C) 1991-2006 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# The default values for assignments are stored in the file
# add_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE EP2C8T144C8
set_global_assignment -name TOP_LEVEL_ENTITY add
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "6.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "21:28:50 MARCH 06, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 7.0
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name VECTOR_INPUT_SOURCE add.vwf
set_global_assignment -name FITTER_EFFORT "AUTO FIT"
set_global_assignment -name VHDL_FILE add.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE add.vwf
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name INCREMENTAL_COMPILATION OFF
set_global_assignment -name PARTITION_NETLIST_TYPE AUTO -section_id Top
set_location_assignment PIN_42 -to b
set_location_assignment PIN_44 -to a
set_location_assignment PIN_17 -to ci
set_location_assignment PIN_28 -to co
set_location_assignment PIN_25 -to s
set_instance_assignment -name PAD_TO_CORE_DELAY 6 -from a -to Add1~66
set_instance_assignment -name PAD_TO_CORE_DELAY 6 -from a -to Add1~67
set_instance_assignment -name PAD_TO_CORE_DELAY 6 -from b -to Add1~66
set_instance_assignment -name PAD_TO_CORE_DELAY 6 -from b -to Add1~67
set_global_assignment -name VHDL_FILE Vhdl1.vhd
set_global_assignment -name VHDL_FILE ../add4/add4.vhd
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