rom.tan.qmsg

在quartus开发环境下

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Apr 02 17:01:54 2007 " "Info: Processing started: Mon Apr 02 17:01:54 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off rom -c rom --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off rom -c rom --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "en data\[1\] 10.478 ns Longest " "Info: Longest tpd from source pin \"en\" to destination pin \"data\[1\]\" is 10.478 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns en 1 PIN PIN_141 8 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_141; Fanout = 8; PIN Node = 'en'" {  } { { "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "" { en } "NODE_NAME" } } { "rom.vhd" "" { Text "D:/my_eda/rom/rom.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.226 ns) + CELL(3.318 ns) 10.478 ns data\[1\] 2 PIN PIN_142 0 " "Info: 2: + IC(6.226 ns) + CELL(3.318 ns) = 10.478 ns; Loc. = PIN_142; Fanout = 0; PIN Node = 'data\[1\]'" {  } { { "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "9.544 ns" { en data[1] } "NODE_NAME" } } { "rom.vhd" "" { Text "D:/my_eda/rom/rom.vhd" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.252 ns ( 40.58 % ) " "Info: Total cell delay = 4.252 ns ( 40.58 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.226 ns ( 59.42 % ) " "Info: Total interconnect delay = 6.226 ns ( 59.42 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/70/quartus/bin/TimingClosureFloorplan.fld" "" "10.478 ns" { en data[1] } "NODE_NAME" } } { "e:/altera/70/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/70/quartus/bin/Technology_Viewer.qrui" "10.478 ns" { en en~combout data[1] } { 0.000ns 0.000ns 6.226ns } { 0.000ns 0.934ns 3.318ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "101 " "Info: Allocated 101 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Apr 02 17:01:55 2007 " "Info: Processing ended: Mon Apr 02 17:01:55 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}