lpm_fifo.sim.rpt

来自「在quartus开发环境下」· RPT 代码 · 共 321 行 · 第 1/4 页

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; Missing 0-Value Coverage                                                                                                                                                                                                                                                        ;
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; Node Name                                                                                                                       ; Output Port Name                                                                                                           ; Output Port Type ;
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; |lpm_fifo|full                                                                                                                  ; |lpm_fifo|full                                                                                                             ; pin_out          ;
; |lpm_fifo|usedw[4]                                                                                                              ; |lpm_fifo|usedw[4]                                                                                                         ; pin_out          ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~6                                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~6                              ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~9                                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~9                              ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~10                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~10                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~12                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~12                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~18                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~18                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~19                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~19                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~20                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~20                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~21                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~21                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~22                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~22                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~23                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~23                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~24                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~24                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|almost_full_comparer_aeb_int~0        ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|almost_full_comparer_aeb_int~0   ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[4]~0                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[4]~0            ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[3]~1                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[3]~1            ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[2]~2                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[2]~2            ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[1]~3                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[1]~3            ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[0]~4                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[0]~4            ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[4]~5                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[4]~5            ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[4]                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[4]              ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[3]                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[3]              ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~50                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~50                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~51                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~51                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~58                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~58                             ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|full_dff                              ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|full_dff                         ; regout           ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|low_addressa[4]                       ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|low_addressa[4]                  ; regout           ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|low_addressa[3]                       ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|low_addressa[3]                  ; regout           ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|cntr_8v6:usedw_counter|counter_cella4 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|cntr_8v6:usedw_counter|safe_q[4] ; regout           ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|cntr_rua:rd_ptr_msb|counter_cella2    ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|cntr_rua:rd_ptr_msb|safe_q[2]    ; regout           ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|cntr_rua:rd_ptr_msb|counter_cella3    ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|cntr_rua:rd_ptr_msb|safe_q[3]    ; regout           ;
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+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Mon Apr 23 17:28:01 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off lpm_fifo -c lpm_fifo
Info: Using vector source file "D:/my_eda2/lpm_fifo/lpm_fifo.vwf"
Info: Overwriting simulation input file with simulation results
    Info: A backup of lpm_fifo.vwf called lpm_fifo.sim_ori.vwf has been created in the db folder
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a0" assumed to occur on falling edge of input clock
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a1" assumed to occur on falling edge of input clock
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a2" assumed to occur on falling edge of input clock
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a3" assumed to occur on falling edge of input clock
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a4" assumed to occur on falling edge of input clock
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a5" assumed to occur on falling edge of input clock
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a6" assumed to occur on falling edge of input clock
Warning: Write to auto-size memory block "fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ram_block1a7" assumed to occur on falling edge of input clock
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      69.17 %
Info: Number of transitions in simulation is 878
Info: Vector file lpm_fifo.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 8 warnings
    Info: Allocated 88 megabytes of memory during processing
    Info: Processing ended: Mon Apr 23 17:28:03 2007
    Info: Elapsed time: 00:00:02