lpm_fifo.sim.rpt

来自「在quartus开发环境下」· RPT 代码 · 共 321 行 · 第 1/4 页

; Glitch Filtering                                                                           ; Off          ; Off           ;
+--------------------------------------------------------------------------------------------+--------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+------------------------------------------------------------------------------------------------------------------------------+
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|altsyncram_qla1:FIFOram|ALTSYNCRAM ;
+------------------------------------------------------------------------------------------------------------------------------+
Memory report data cannot be output to ASCII.
Please use Quartus II to view the memory report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      69.17 % ;
; Total nodes checked                                 ; 114          ;
; Total output ports checked                          ; 120          ;
; Total output ports with complete 1/0-value coverage ; 83           ;
; Total output ports with no 1/0-value coverage       ; 21           ;
; Total output ports with no 1-value coverage         ; 27           ;
; Total output ports with no 0-value coverage         ; 31           ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                                                                               ;
+---------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                                       ; Output Port Name                                                                                                                     ; Output Port Type ;
+---------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------+------------------+
; |lpm_fifo|rdreq                                                                                                                 ; |lpm_fifo|rdreq                                                                                                                      ; out              ;
; |lpm_fifo|clock                                                                                                                 ; |lpm_fifo|clock                                                                                                                      ; out              ;
; |lpm_fifo|data[7]                                                                                                               ; |lpm_fifo|data[7]                                                                                                                    ; out              ;
; |lpm_fifo|data[6]                                                                                                               ; |lpm_fifo|data[6]                                                                                                                    ; out              ;
; |lpm_fifo|data[5]                                                                                                               ; |lpm_fifo|data[5]                                                                                                                    ; out              ;
; |lpm_fifo|data[4]                                                                                                               ; |lpm_fifo|data[4]                                                                                                                    ; out              ;
; |lpm_fifo|data[3]                                                                                                               ; |lpm_fifo|data[3]                                                                                                                    ; out              ;
; |lpm_fifo|data[2]                                                                                                               ; |lpm_fifo|data[2]                                                                                                                    ; out              ;
; |lpm_fifo|data[1]                                                                                                               ; |lpm_fifo|data[1]                                                                                                                    ; out              ;
; |lpm_fifo|data[0]                                                                                                               ; |lpm_fifo|data[0]                                                                                                                    ; out              ;
; |lpm_fifo|empty                                                                                                                 ; |lpm_fifo|empty                                                                                                                      ; pin_out          ;
; |lpm_fifo|q[7]                                                                                                                  ; |lpm_fifo|q[7]                                                                                                                       ; pin_out          ;
; |lpm_fifo|q[6]                                                                                                                  ; |lpm_fifo|q[6]                                                                                                                       ; pin_out          ;
; |lpm_fifo|q[5]                                                                                                                  ; |lpm_fifo|q[5]                                                                                                                       ; pin_out          ;
; |lpm_fifo|q[4]                                                                                                                  ; |lpm_fifo|q[4]                                                                                                                       ; pin_out          ;
; |lpm_fifo|q[3]                                                                                                                  ; |lpm_fifo|q[3]                                                                                                                       ; pin_out          ;
; |lpm_fifo|q[2]                                                                                                                  ; |lpm_fifo|q[2]                                                                                                                       ; pin_out          ;
; |lpm_fifo|q[1]                                                                                                                  ; |lpm_fifo|q[1]                                                                                                                       ; pin_out          ;
; |lpm_fifo|q[0]                                                                                                                  ; |lpm_fifo|q[0]                                                                                                                       ; pin_out          ;
; |lpm_fifo|usedw[3]                                                                                                              ; |lpm_fifo|usedw[3]                                                                                                                   ; pin_out          ;
; |lpm_fifo|usedw[2]                                                                                                              ; |lpm_fifo|usedw[2]                                                                                                                   ; pin_out          ;
; |lpm_fifo|usedw[1]                                                                                                              ; |lpm_fifo|usedw[1]                                                                                                                   ; pin_out          ;
; |lpm_fifo|usedw[0]                                                                                                              ; |lpm_fifo|usedw[0]                                                                                                                   ; pin_out          ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~0                                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~0                                        ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~7                                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~7                                        ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~13                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~13                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~14                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~14                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~15                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~15                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~16                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~16                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~25                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~25                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~26                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~26                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~27                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~27                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|two_comparison_aeb_int~0              ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|two_comparison_aeb_int~0                   ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~41                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~41                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~42                                  ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|_~42                                       ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[3]~6                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[3]~6                      ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[2]~7                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[2]~7                      ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[1]~8                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[1]~8                      ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[0]~9                 ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[0]~9                      ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[2]                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[2]                        ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[1]                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[1]                        ; out0             ;
; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[0]                   ; |lpm_fifo|fifo:inst|scfifo:scfifo_component|scfifo_0mv:auto_generated|a_dpfifo_7sv:dpfifo|ram_read_address[0]                        ; out0             ;