📄 dds_top.mdl
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ExtModeMexFile "ext_comm"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
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BusObject "BusObject"
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OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
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LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
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BlockType Outport
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BlockType Reference
Name "Aword"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [155, 147, 220, 163]
ForegroundColor "blue"
SourceBlock "allblocks_alteradspbuilder/Input"
SourceType "AltBus AlteraBlockSet"
sgn "Unsigned Integer"
nodetype "Input Port"
bwl "10"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "Aword"
ppat "D:\\my_eda3\\DDS\\DSPBuilder_dds_top"
nSgCpl "1"
SIGNALCOMPILER_PARAMS "sgn;Unsigned Integer;nodetype;Input Port;bwl;10"
";bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
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SamplingMode "Sample based"
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SampleTime "inf"
FramePeriod "inf"
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BlockType Constant
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Value "100"
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OutDataTypeMode "Inherit from 'Constant value'"
OutDataType "sfix(16)"
ConRadixGroup "Use specified scaling"
OutScaling "2^0"
SampleTime "inf"
FramePeriod "inf"
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Block {
BlockType Reference
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Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [155, 112, 220, 128]
ForegroundColor "blue"
SourceBlock "allblocks_alteradspbuilder/Input"
SourceType "AltBus AlteraBlockSet"
sgn "Unsigned Integer"
nodetype "Input Port"
bwl "32"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "Fword"
ppat "D:\\my_eda3\\DDS\\DSPBuilder_dds_top"
nSgCpl "1"
SIGNALCOMPILER_PARAMS "sgn;Unsigned Integer;nodetype;Input Port;bwl;32"
";bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
}
Block {
BlockType Reference
Name "Pword"
Description "Sign Binary Fractionnal"
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ForegroundColor "blue"
SourceBlock "allblocks_alteradspbuilder/Input"
SourceType "AltBus AlteraBlockSet"
sgn "Unsigned Integer"
nodetype "Input Port"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "Pword"
ppat "D:\\my_eda3\\DDS\\DSPBuilder_dds_top"
nSgCpl "1"
SIGNALCOMPILER_PARAMS "sgn;Unsigned Integer;nodetype;Input Port;bwl;8;"
"bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
}
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BlockType Scope
Name "Scope"
Ports [1]
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Floating off
Location [146, 359, 842, 575]
Open off
NumInputPorts "1"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
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YMin "-20"
YMax "120"
DataFormat "StructureWithTime"
SampleTime "0"
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Block {
BlockType Reference
Name "SignalCompiler"
Ports []
Position [414, 18, 483, 65]
ForegroundColor "blue"
SourceBlock "allblocks_alteradspbuilder/SignalCompiler"
SourceType "SignalCompiler"
family "Stratix"
opt "Balanced"
synthtool "Others"
vstim on
SynthAct "None"
workdir "D:\\my_eda3\\DDS"
Procetype "prod"
UseReset on
ResetPin "Active High"
ClockPin "Output to Pin"
ClockPeriod "20"
UseSignalTap off
CreatePtfFile off
SignalTapDepth "128"
VerilogSupport off
UniqueVHDLHierarchyName off
RegenerateIPFunctionalModel off
RunUpdatedSimulation off
JTAGCable "USB-Blaster [USB-0]"
dspb_ver "6.1"
}
Block {
BlockType Reference
Name "Sout"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [400, 112, 465, 128]
ForegroundColor "blue"
SourceBlock "allblocks_alteradspbuilder/Output"
SourceType "AltBus AlteraBlockSet"
sgn "Unsigned Integer"
nodetype "Output Port"
bwl "10"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "Output"
nSgCpl "0"
SIGNALCOMPILER_PARAMS "sgn;Unsigned Integer;nodetype;Output Port;bwl;1"
"0;bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
}
Block {
BlockType SubSystem
Name "dds"
Ports [3, 1]
Position [265, 64, 355, 176]
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RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
MaskType "SubSystem AlteraBlockSet"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
System {
Name "dds"
Location [144, 83, 996, 722]
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ModelBrowserWidth 160
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PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
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ShowPageBoundaries off
ZoomFactor "100"
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Name "P[7:0]"
Position [130, 63, 160, 77]
IconDisplay "Port number"
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BlockType Inport
Name "F[31:0]"
Position [125, 208, 155, 222]
Port "2"
IconDisplay "Port number"
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Block {
BlockType Inport
Name "A[9:0]"
Position [135, 408, 165, 422]
Port "3"
IconDisplay "Port number"
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Block {
BlockType Reference
Name "AltBus"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [485, 187, 550, 203]
ForegroundColor "blue"
SourceBlock "allblocks_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Unsigned Integer"
nodetype "Internal Node"
bwl "32"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "AltBus"
ppat "d:\\dspbuilder\\Altlib\\DSPBuilder_allblock"
"s_alteradspbuilder"
nSgCpl "0"
SIGNALCOMPILER_PARAMS "sgn;Unsigned Integer;nodetype;Internal Node"
";bwl;32;bwr;0;sat;off;rnd;off;cst;0;LocPin;any;"
}
Block {
BlockType Reference
Name "Aword"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [215, 407, 280, 423]
ForegroundColor "blue"
SourceBlock "allblocks_alteradspbuilder/Input"
SourceType "AltBus AlteraBlockSet"
sgn "Unsigned Integer"
nodetype "Input Port"
bwl "10"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "Aword"
ppat "d:\\dspbuilder\\Altlib\\DSPBuilder_allblock"
"s_alteradspbuilder"
nSgCpl "0"
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