mult_nn01.tdf

在quartus开发环境下

--lpm_mult CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEDICATED_MULTIPLIER_CIRCUITRY="AUTO" DEVICE_FAMILY="Cyclone II" DSP_BLOCK_BALANCING="Auto" INPUT_A_IS_CONSTANT="NO" INPUT_B_IS_CONSTANT="NO" LPM_REPRESENTATION="SIGNED" LPM_WIDTHA=10 LPM_WIDTHB=10 LPM_WIDTHP=20 LPM_WIDTHS=1 MAXIMIZE_SPEED=6 dataa datab result CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 7.0 cbx_cycloneii 2006:09:29:19:03:26:SJ cbx_lpm_add_sub 2006:10:10:22:03:24:SJ cbx_lpm_mult 2006:11:01:17:02:48:SJ cbx_mgl 2006:10:27:16:08:48:SJ cbx_padd 2006:11:07:16:02:02:SJ cbx_stratix 2006:09:18:10:47:42:SJ cbx_stratixii 2006:10:13:14:01:30:SJ cbx_util_mgl 2006:11:03:10:32:30:SJ  VERSION_END


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FUNCTION cycloneii_mac_mult (aclr, clk, dataa[dataa_width-1..0], datab[datab_width-1..0], ena, signa, signb)
WITH ( 	dataa_clock,	dataa_width,	datab_clock,	datab_width,	signa_clock,	signb_clock) 
RETURNS ( dataout[dataa_width+datab_width-1..0]);
PARAMETERS
(
	dataa_width = 0
);
FUNCTION cycloneii_mac_out (aclr, clk, dataa[dataa_width-1..0], ena)
WITH ( 	dataa_width,	output_clock) 
RETURNS ( dataout[dataa_width-1..0]);

--synthesis_resources = dsp_9bit 2 
SUBDESIGN mult_nn01
( 
	dataa[9..0]	:	input;
	datab[9..0]	:	input;
	result[19..0]	:	output;
) 
VARIABLE 
	mac_mult1 : cycloneii_mac_mult
		WITH (
			dataa_clock = "none",
			dataa_width = 10,
			datab_clock = "none",
			datab_width = 10,
			signa_clock = "none",
			signb_clock = "none"
		);
	mac_out2 : cycloneii_mac_out
		WITH (
			dataa_width = 20,
			output_clock = "none"
		);

BEGIN 
	mac_mult1.dataa[] = ( dataa[]);
	mac_mult1.datab[] = ( datab[]);
	mac_mult1.signa = B"1";
	mac_mult1.signb = B"1";
	mac_out2.dataa[] = mac_mult1.dataout[];
	result[19..0] = mac_out2.dataout[19..0];
END;
--VALID FILE