hyperthermia_top.map.qmsg

在quartus开发环境下

{ "Info" "ISGN_ELABORATION_HEADER" "two_dimension_top:inst1\|add_sub:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborated megafunction instantiation \"two_dimension_top:inst1\|add_sub:inst1\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "add_sub.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/add_sub.vhd" 81 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/add_sub_ijf.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/add_sub_ijf.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 add_sub_ijf " "Info: Found entity 1: add_sub_ijf" {  } { { "db/add_sub_ijf.tdf" "" { Text "D:/my_eda4/Hyperthermia_1/db/add_sub_ijf.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "add_sub_ijf two_dimension_top:inst1\|add_sub:inst1\|lpm_add_sub:lpm_add_sub_component\|add_sub_ijf:auto_generated " "Info: Elaborating entity \"add_sub_ijf\" for hierarchy \"two_dimension_top:inst1\|add_sub:inst1\|lpm_add_sub:lpm_add_sub_component\|add_sub_ijf:auto_generated\"" {  } { { "lpm_add_sub.tdf" "auto_generated" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 119 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_dff0.vhd 2 1 " "Warning: Using design file lpm_dff0.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lpm_dff0-SYN " "Info: Found design unit 1: lpm_dff0-SYN" {  } { { "lpm_dff0.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/lpm_dff0.vhd" 52 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 lpm_dff0 " "Info: Found entity 1: lpm_dff0" {  } { { "lpm_dff0.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/lpm_dff0.vhd" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_dff0 two_dimension_top:inst1\|lpm_dff0:inst2 " "Info: Elaborating entity \"lpm_dff0\" for hierarchy \"two_dimension_top:inst1\|lpm_dff0:inst2\"" {  } { { "two_dimension_top.bdf" "inst2" { Schematic "D:/my_eda4/Hyperthermia_1/two_dimension_top.bdf" { { 144 72 216 224 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/70/quartus/libraries/megafunctions/lpm_ff.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/70/quartus/libraries/megafunctions/lpm_ff.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_ff " "Info: Found entity 1: lpm_ff" {  } { { "lpm_ff.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_ff.tdf" 48 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_ff two_dimension_top:inst1\|lpm_dff0:inst2\|lpm_ff:lpm_ff_component " "Info: Elaborating entity \"lpm_ff\" for hierarchy \"two_dimension_top:inst1\|lpm_dff0:inst2\|lpm_ff:lpm_ff_component\"" {  } { { "lpm_dff0.vhd" "lpm_ff_component" { Text "D:/my_eda4/Hyperthermia_1/lpm_dff0.vhd" 74 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "two_dimension_top:inst1\|lpm_dff0:inst2\|lpm_ff:lpm_ff_component " "Info: Elaborated megafunction instantiation \"two_dimension_top:inst1\|lpm_dff0:inst2\|lpm_ff:lpm_ff_component\"" {  } { { "lpm_dff0.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/lpm_dff0.vhd" 74 0 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "clk_1hz.vhd 2 1 " "Warning: Using design file clk_1hz.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 clk_1hz-one " "Info: Found design unit 1: clk_1hz-one" {  } { { "clk_1hz.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/clk_1hz.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 clk_1hz " "Info: Found entity 1: clk_1hz" {  } { { "clk_1hz.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/clk_1hz.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "clk_1hz two_dimension_top:inst1\|clk_1hz:inst11 " "Info: Elaborating entity \"clk_1hz\" for hierarchy \"two_dimension_top:inst1\|clk_1hz:inst11\"" {  } { { "two_dimension_top.bdf" "inst11" { Schematic "D:/my_eda4/Hyperthermia_1/two_dimension_top.bdf" { { 160 -72 40 232 "inst11" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "clk_div:inst\|\\process4:count\[0\] two_dimension_top:inst1\|pwm:inst6\|cnt\[0\] " "Info: Duplicate register \"clk_div:inst\|\\process4:count\[0\]\" merged to single register \"two_dimension_top:inst1\|pwm:inst6\|cnt\[0\]\"" {  } {  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "two_dimension_top:inst1\|clk_1hz:inst11\|count\[0\] two_dimension_top:inst1\|pwm:inst6\|cnt\[0\] " "Info: Duplicate register \"two_dimension_top:inst1\|clk_1hz:inst11\|count\[0\]\" merged to single register \"two_dimension_top:inst1\|pwm:inst6\|cnt\[0\]\"" {  } { { "clk_1hz.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/clk_1hz.vhd" 15 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "two_dimension_top:inst1\|clk_1hz:inst11\|count\[1\] two_dimension_top:inst1\|pwm:inst6\|cnt\[1\] " "Info: Duplicate register \"two_dimension_top:inst1\|clk_1hz:inst11\|count\[1\]\" merged to single register \"two_dimension_top:inst1\|pwm:inst6\|cnt\[1\]\"" {  } { { "clk_1hz.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/clk_1hz.vhd" 15 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "display:inst4\|two_to_ten:inst\|inte_one\[0\] " "Warning: Latch display:inst4\|two_to_ten:inst\|inte_one\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA temperature_top:inst7\|temperature:inst\|t\[4\] " "Warning: Ports D and ENA on the latch are fed by the same signal temperature_top:inst7\|temperature:inst\|t\[4\]" {  } { { "temperature.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/temperature.vhd" 20 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "two_to_ten.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_to_ten.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "display:inst4\|two_to_ten:inst\|inte_one\[1\] " "Warning: Latch display:inst4\|two_to_ten:inst\|inte_one\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA temperature_top:inst7\|temperature:inst\|t\[5\] " "Warning: Ports D and ENA on the latch are fed by the same signal temperature_top:inst7\|temperature:inst\|t\[5\]" {  } { { "temperature.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/temperature.vhd" 20 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "two_to_ten.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_to_ten.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "display:inst4\|two_to_ten:inst\|inte_one\[2\] " "Warning: Latch display:inst4\|two_to_ten:inst\|inte_one\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA temperature_top:inst7\|temperature:inst\|t\[6\] " "Warning: Ports D and ENA on the latch are fed by the same signal temperature_top:inst7\|temperature:inst\|t\[6\]" {  } { { "temperature.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/temperature.vhd" 20 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "two_to_ten.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_to_ten.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "display:inst4\|two_to_ten:inst\|inte_one\[3\] " "Warning: Latch display:inst4\|two_to_ten:inst\|inte_one\[3\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA temperature_top:inst7\|temperature:inst\|t\[9\] " "Warning: Ports D and ENA on the latch are fed by the same signal temperature_top:inst7\|temperature:inst\|t\[9\]" {  } { { "temperature.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/temperature.vhd" 20 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "two_to_ten.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_to_ten.vhd" 21 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "two_dimension_top:inst1\|two_dimension_fuzzy:inst\|rt\[0\] " "Warning: Latch two_dimension_top:inst1\|two_dimension_fuzzy:inst\|rt\[0\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA two_dimension_top:inst1\|two_dimension_fuzzy:inst\|t_rate_n\[9\] " "Warning: Ports D and ENA on the latch are fed by the same signal two_dimension_top:inst1\|two_dimension_fuzzy:inst\|t_rate_n\[9\]" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "two_dimension_top:inst1\|two_dimension_fuzzy:inst\|rt\[1\] " "Warning: Latch two_dimension_top:inst1\|two_dimension_fuzzy:inst\|rt\[1\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA two_dimension_top:inst1\|two_dimension_fuzzy:inst\|t_rate_n\[9\] " "Warning: Ports D and ENA on the latch are fed by the same signal two_dimension_top:inst1\|two_dimension_fuzzy:inst\|t_rate_n\[9\]" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 -1 0 } }  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_UNSAFE_LATCH_HDR" "two_dimension_top:inst1\|two_dimension_fuzzy:inst\|rt\[2\] " "Warning: Latch two_dimension_top:inst1\|two_dimension_fuzzy:inst\|rt\[2\] has unsafe behavior" { { "Warning" "WOPT_MLS_UNSAFE_LATCH_SUB" "D ENA two_dimension_top:inst1\|add_sub:inst3\|lpm_add_sub:lpm_add_sub_component\|add_sub_ijf:auto_generated\|op_1~152 " "Warning: Ports D and ENA on the latch are fed by the same signal two_dimension_top:inst1\|add_sub:inst3\|lpm_add_sub:lpm_add_sub_component\|add_sub_ijf:auto_generated\|op_1~152" {  } {  } 0 0 "Ports %1!s! and %2!s! on the latch are fed by the same signal %3!s!" 0 0}  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 -1 0 } }  } 0 0 "Latch %1!s! has unsafe behavior" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "dot VCC " "Warning: Pin \"dot\" stuck at VCC" {  } { { "Hyperthermia_top.bdf" "" { Schematic "D:/my_eda4/Hyperthermia_1/Hyperthermia_top.bdf" { { 312 168 344 328 "dot" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} { "Warning" "WOPT_MLS_STUCK_PIN" "deci_one\[4\] VCC " "Warning: Pin \"deci_one\[4\]\" stuck at VCC" {  } { { "Hyperthermia_top.bdf" "" { Schematic "D:/my_eda4/Hyperthermia_1/Hyperthermia_top.bdf" { { 296 168 344 312 "deci_one\[6..0\]" "" } } } }  } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 42 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 42 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "154 " "Info: Allocated 154 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed May 30 10:54:46 2007 " "Info: Processing ended: Wed May 30 10:54:46 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:25 " "Info: Elapsed time: 00:00:25" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IQSYN_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0 0 "*******************************************************************" 0 0}
{ "Info" "IQSYN_START_BANNER_PRODUCT" "Partition Merge Quartus II " "Info: Running Quartus II Partition Merge" { { "Info" "IQSYN_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQSYN_START_BANNER_TIME" "Wed May 30 10:54:47 2007 " "Info: Processing started: Wed May 30 10:54:47 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 0 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "465 " "Info: Implemented 465 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "6 " "Info: Implemented 6 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "31 " "Info: Implemented 31 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_BIDIRS" "1 " "Info: Implemented 1 bidirectional pins" {  } {  } 0 0 "Implemented %1!d! bidirectional pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "423 " "Info: Implemented 423 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0} { "Info" "ISCL_SCL_TM_RAMS" "4 " "Info: Implemented 4 RAM segments" {  } {  } 0 0 "Implemented %1!d! RAM segments" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQSYN_ERROR_COUNT" "Partition Merge 0 s 0 s Quartus II " "Info: Quartus II Partition Merge was successful. 0 errors, 0 warnings" { { "Info" "IQSYN_END_BANNER_TIME" "Wed May 30 10:54:49 2007 " "Info: Processing ended: Wed May 30 10:54:49 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQSYN_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}