hyperthermia_top.map.qmsg

在quartus开发环境下

{ "Warning" "WSGN_SEARCH_FILE" "two_dimension_fuzzy.vhd 2 1 " "Warning: Using design file two_dimension_fuzzy.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 two_dimension_fuzzy-one " "Info: Found design unit 1: two_dimension_fuzzy-one" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 13 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 two_dimension_fuzzy " "Info: Found entity 1: two_dimension_fuzzy" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "two_dimension_fuzzy two_dimension_top:inst1\|two_dimension_fuzzy:inst " "Info: Elaborating entity \"two_dimension_fuzzy\" for hierarchy \"two_dimension_top:inst1\|two_dimension_fuzzy:inst\"" {  } { { "two_dimension_top.bdf" "inst" { Schematic "D:/my_eda4/Hyperthermia_1/two_dimension_top.bdf" { { 112 472 624 240 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "e two_dimension_fuzzy.vhd(19) " "Warning (10631): VHDL Process Statement warning at two_dimension_fuzzy.vhd(19): inferring latch(es) for signal or variable \"e\", which holds its previous value in one or more paths through the process" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 19 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "rt two_dimension_fuzzy.vhd(47) " "Warning (10631): VHDL Process Statement warning at two_dimension_fuzzy.vhd(47): inferring latch(es) for signal or variable \"rt\", which holds its previous value in one or more paths through the process" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "t_rate_n two_dimension_fuzzy.vhd(47) " "Warning (10631): VHDL Process Statement warning at two_dimension_fuzzy.vhd(47): inferring latch(es) for signal or variable \"t_rate_n\", which holds its previous value in one or more paths through the process" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[0\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[0\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[1\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[1\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[2\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[2\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[3\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[3\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[4\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[4\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[5\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[5\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[6\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[6\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[7\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[7\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[8\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[8\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "t_rate_n\[9\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"t_rate_n\[9\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "rt\[0\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"rt\[0\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "rt\[1\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"rt\[1\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "rt\[2\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"rt\[2\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "rt\[3\] two_dimension_fuzzy.vhd(47) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(47): inferred latch for \"rt\[3\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 47 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "e\[0\] two_dimension_fuzzy.vhd(19) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(19): inferred latch for \"e\[0\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 19 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "e\[1\] two_dimension_fuzzy.vhd(19) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(19): inferred latch for \"e\[1\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 19 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "e\[2\] two_dimension_fuzzy.vhd(19) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(19): inferred latch for \"e\[2\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 19 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_L2_VRFC_LATCH_INFERRED" "e\[3\] two_dimension_fuzzy.vhd(19) " "Info (10041): Verilog HDL or VHDL info at two_dimension_fuzzy.vhd(19): inferred latch for \"e\[3\]\"" {  } { { "two_dimension_fuzzy.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/two_dimension_fuzzy.vhd" 19 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "add_sub.vhd 2 1 " "Warning: Using design file add_sub.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 add_sub-SYN " "Info: Found design unit 1: add_sub-SYN" {  } { { "add_sub.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/add_sub.vhd" 54 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 add_sub " "Info: Found entity 1: add_sub" {  } { { "add_sub.vhd" "" { Text "D:/my_eda4/Hyperthermia_1/add_sub.vhd" 42 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "add_sub two_dimension_top:inst1\|add_sub:inst1 " "Info: Elaborating entity \"add_sub\" for hierarchy \"two_dimension_top:inst1\|add_sub:inst1\"" {  } { { "two_dimension_top.bdf" "inst1" { Schematic "D:/my_eda4/Hyperthermia_1/two_dimension_top.bdf" { { -64 248 408 64 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "e:/altera/70/quartus/libraries/megafunctions/lpm_add_sub.tdf" 102 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_add_sub two_dimension_top:inst1\|add_sub:inst1\|lpm_add_sub:lpm_add_sub_component " "Info: Elaborating entity \"lpm_add_sub\" for hierarchy \"two_dimension_top:inst1\|add_sub:inst1\|lpm_add_sub:lpm_add_sub_component\"" {  } { { "add_sub.vhd" "lpm_add_sub_component" { Text "D:/my_eda4/Hyperthermia_1/add_sub.vhd" 81 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}