acquistion.gyd

CPLD初始化程序-用于DSP5416与SAA7111A的时序控制初始化

Pin Freeze File:  version G.28

9572XL44PC XC9572XL-5-PC44
href S:PIN44
llc2 S:PIN6
reset S:PIN42
tclk0 S:PIN29
vcc S:PIN37
vref S:PIN1
outer3 S:PIN33
outer4 S:PIN34
outer S:PIN38
outer2 S:PIN40


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_17 q1/q1_RSTF__$INT q2
PARTITION FB2_8 outer_OBUF
PARTITION FB2_11 tempdivclk2

PARTITION FB3_18 q1
PARTITION FB4_15 outer3_OBUF tempdivclk1 outer4_OBUF count<0>