timer.hif

采用Altera公司的CycloneII芯片EP2C8的一些程序代码。

Version 8.0 Build 215 05/29/2008 SJ Full Version
11
945
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
Timer
# storage
db|Timer.(0).cnf
db|Timer.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Timer.v
51443a495757bcee39d4b878b9143b17
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# include_file {
Timer_Cout.v
dd784ea6f71cd27bc181dc7937c766
Timer_Disp.v
adb8a5686429c026aa28a9c22ab6
}
# hierarchies {
|
}
# macro_sequence

# end
# entity
Timer_Cout
# storage
db|Timer.(1).cnf
db|Timer.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Timer_Cout.v
dd784ea6f71cd27bc181dc7937c766
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# hierarchies {
Timer_Cout:Timer_Cout_A
}
# macro_sequence

# end
# entity
Timer_Disp
# storage
db|Timer.(2).cnf
db|Timer.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
Timer_Disp.v
adb8a5686429c026aa28a9c22ab6
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
VERILOG_CONSTANT_LOOP_LIMIT
5000
VERILOG_NON_CONSTANT_LOOP_LIMIT
250
}
# hierarchies {
Timer_Disp:Timer_Disp_A
}
# macro_sequence

# end
# complete