basegate.tan.qmsg

采用Altera公司的CycloneII芯片EP2C8的一些程序代码。

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jul 02 21:46:14 2008 " "Info: Processing started: Wed Jul 02 21:46:14 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off BaseGate -c BaseGate --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off BaseGate -c BaseGate --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "Sw_n\[0\] Led\[0\] 13.672 ns Longest " "Info: Longest tpd from source pin \"Sw_n\[0\]\" to destination pin \"Led\[0\]\" is 13.672 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.994 ns) 0.994 ns Sw_n\[0\] 1 PIN PIN_161 1 " "Info: 1: + IC(0.000 ns) + CELL(0.994 ns) = 0.994 ns; Loc. = PIN_161; Fanout = 1; PIN Node = 'Sw_n\[0\]'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sw_n[0] } "NODE_NAME" } } { "BaseGate.v" "" { Text "F:/FPGA4U/Example/FPGA4U/BaseGate/BaseGate/BaseGate.v" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.462 ns) + CELL(0.647 ns) 8.103 ns Led~0 2 COMB LCCOMB_X26_Y18_N0 1 " "Info: 2: + IC(6.462 ns) + CELL(0.647 ns) = 8.103 ns; Loc. = LCCOMB_X26_Y18_N0; Fanout = 1; COMB Node = 'Led~0'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "7.109 ns" { Sw_n[0] Led~0 } "NODE_NAME" } } { "BaseGate.v" "" { Text "F:/FPGA4U/Example/FPGA4U/BaseGate/BaseGate/BaseGate.v" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.293 ns) + CELL(3.276 ns) 13.672 ns Led\[0\] 3 PIN PIN_193 0 " "Info: 3: + IC(2.293 ns) + CELL(3.276 ns) = 13.672 ns; Loc. = PIN_193; Fanout = 0; PIN Node = 'Led\[0\]'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "5.569 ns" { Led~0 Led[0] } "NODE_NAME" } } { "BaseGate.v" "" { Text "F:/FPGA4U/Example/FPGA4U/BaseGate/BaseGate/BaseGate.v" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.917 ns ( 35.96 % ) " "Info: Total cell delay = 4.917 ns ( 35.96 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.755 ns ( 64.04 % ) " "Info: Total interconnect delay = 8.755 ns ( 64.04 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "13.672 ns" { Sw_n[0] Led~0 Led[0] } "NODE_NAME" } } { "d:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/80/quartus/bin/Technology_Viewer.qrui" "13.672 ns" { Sw_n[0] {} Sw_n[0]~combout {} Led~0 {} Led[0] {} } { 0.000ns 0.000ns 6.462ns 2.293ns } { 0.000ns 0.994ns 0.647ns 3.276ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "123 " "Info: Peak virtual memory: 123 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Jul 02 21:46:14 2008 " "Info: Processing ended: Wed Jul 02 21:46:14 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}