📄 prev_cmp_basegate.tan.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Apr 15 09:28:52 2008 " "Info: Processing started: Tue Apr 15 09:28:52 2008" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off BaseGate -c BaseGate --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off BaseGate -c BaseGate --timing_analysis_only" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "Sw_n\[0\] Led\[2\] 12.542 ns Longest " "Info: Longest tpd from source pin \"Sw_n\[0\]\" to destination pin \"Led\[2\]\" is 12.542 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.994 ns) 0.994 ns Sw_n\[0\] 1 PIN PIN_161 2 " "Info: 1: + IC(0.000 ns) + CELL(0.994 ns) = 0.994 ns; Loc. = PIN_161; Fanout = 2; PIN Node = 'Sw_n\[0\]'" { } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { Sw_n[0] } "NODE_NAME" } } { "BaseGate.v" "" { Text "L:/FPGA4U/Example/FPGA4U/BaseGate/BaseGate/BaseGate.v" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(6.757 ns) + CELL(0.319 ns) 8.070 ns Led~0 2 COMB LCCOMB_X8_Y18_N8 1 " "Info: 2: + IC(6.757 ns) + CELL(0.319 ns) = 8.070 ns; Loc. = LCCOMB_X8_Y18_N8; Fanout = 1; COMB Node = 'Led~0'" { } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.076 ns" { Sw_n[0] Led~0 } "NODE_NAME" } } { "BaseGate.v" "" { Text "L:/FPGA4U/Example/FPGA4U/BaseGate/BaseGate/BaseGate.v" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.186 ns) + CELL(3.286 ns) 12.542 ns Led\[2\] 3 PIN PIN_199 0 " "Info: 3: + IC(1.186 ns) + CELL(3.286 ns) = 12.542 ns; Loc. = PIN_199; Fanout = 0; PIN Node = 'Led\[2\]'" { } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.472 ns" { Led~0 Led[2] } "NODE_NAME" } } { "BaseGate.v" "" { Text "L:/FPGA4U/Example/FPGA4U/BaseGate/BaseGate/BaseGate.v" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.599 ns ( 36.67 % ) " "Info: Total cell delay = 4.599 ns ( 36.67 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.943 ns ( 63.33 % ) " "Info: Total interconnect delay = 7.943 ns ( 63.33 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "12.542 ns" { Sw_n[0] Led~0 Led[2] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "12.542 ns" { Sw_n[0] {} Sw_n[0]~combout {} Led~0 {} Led[2] {} } { 0.000ns 0.000ns 6.757ns 1.186ns } { 0.000ns 0.994ns 0.319ns 3.286ns } "" } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "113 " "Info: Allocated 113 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Apr 15 09:28:55 2008 " "Info: Processing ended: Tue Apr 15 09:28:55 2008" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
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