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📄 cmd_pcmcia.c

📁 F:worksip2440a board可启动u-boot-like.tar.gz F:worksip2440a board可启动u-boot-like.tar.gz
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	}	for (i=0; i<n_features; ++i) {		print_fixed (feature_p[i]);	}	if (!found) {		printf ("unknown card type\n");		return (1);	}	ide_devices_found |= (1 << slot);#if CONFIG_CPC45#else	/* set I/O area in config reg -> only valid for ARGOSY D5!!! */	*((uchar *)(addr + config_base)) = 1;#endif#if 0	printf("\n## Config_base = %04x ###\n", config_base);	printf("Configuration Option Register: %02x @ %x\n", readb(addr + config_base), addr + config_base);	printf("Card Configuration and Status Register: %02x\n", readb(addr + config_base + 2));	printf("Pin Replacement Register Register: %02x\n", readb(addr + config_base + 4));	printf("Socket and Copy Register: %02x\n", readb(addr + config_base + 6));#endif	return (0);}#endif	/* CONFIG_IDE_8xx_PCCARD *//* -------------------------------------------------------------------- *//* -------------------------------------------------------------------- *//* board specific stuff:						*//* voltage_set(), hardware_enable() and hardware_disable()		*//* -------------------------------------------------------------------- *//* -------------------------------------------------------------------- *//* RPX Boards from Embedded Planet					*//* -------------------------------------------------------------------- */#if defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks. * SYPCR is write once only, therefore must the slowest memory be faster * than the bus monitor or we will get a machine check due to the bus timeout. */#define PCMCIA_BOARD_MSG "RPX CLASSIC or RPX LITE"#undef PCMCIA_BMT_LIMIT#define PCMCIA_BMT_LIMIT (6*8)static int voltage_set(int slot, int vcc, int vpp){	u_long reg = 0;	switch(vcc) {	case 0: break;	case 33: reg |= BCSR1_PCVCTL4; break;	case 50: reg |= BCSR1_PCVCTL5; break;	default: return 1;	}	switch(vpp) {	case 0: break;	case 33:	case 50:		if(vcc == vpp)			reg |= BCSR1_PCVCTL6;		else			return 1;		break;	case 120:		reg |= BCSR1_PCVCTL7;	default: return 1;	}	if(vcc == 120)	   return 1;	/* first, turn off all power */	*((uint *)RPX_CSR_ADDR) &= ~(BCSR1_PCVCTL4 | BCSR1_PCVCTL5				     | BCSR1_PCVCTL6 | BCSR1_PCVCTL7);	/* enable new powersettings */	*((uint *)RPX_CSR_ADDR) |= reg;	return 0;}#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5Vstatic int hardware_enable (int slot){	return 0;	/* No hardware to enable */}#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)static int hardware_disable(int slot){	return 0;	/* No hardware to disable */}#endif	/* CFG_CMD_PCMCIA */#endif	/* CONFIG_RPXCLASSIC *//* -------------------------------------------------------------------- *//* (F)ADS Boards from Motorola						*//* -------------------------------------------------------------------- */#if defined(CONFIG_ADS) || defined(CONFIG_FADS)#ifdef CONFIG_ADS#define PCMCIA_BOARD_MSG "ADS"#define PCMCIA_GLITCHY_CD  /* My ADS board needs this */#else#define PCMCIA_BOARD_MSG "FADS"#endifstatic int voltage_set(int slot, int vcc, int vpp){	u_long reg = 0;	switch(vpp) {	case 0: reg = 0; break;	case 50: reg = 1; break;	case 120: reg = 2; break;	default: return 1;	}	switch(vcc) {	case 0: reg = 0; break;#ifdef CONFIG_ADS	case 50: reg = BCSR1_PCCVCCON; break;#endif#ifdef CONFIG_FADS	case 33: reg = BCSR1_PCCVCC0 | BCSR1_PCCVCC1; break;	case 50: reg = BCSR1_PCCVCC1; break;#endif	default: return 1;	}	/* first, turn off all power */#ifdef CONFIG_ADS	*((uint *)BCSR1) |= BCSR1_PCCVCCON;#endif#ifdef CONFIG_FADS	*((uint *)BCSR1) &= ~(BCSR1_PCCVCC0 | BCSR1_PCCVCC1);#endif	*((uint *)BCSR1) &= ~BCSR1_PCCVPP_MASK;	/* enable new powersettings */#ifdef CONFIG_ADS	*((uint *)BCSR1) &= ~reg;#endif#ifdef CONFIG_FADS	*((uint *)BCSR1) |= reg;#endif 	*((uint *)BCSR1) |= reg << 20;	return 0;}#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5Vstatic int hardware_enable(int slot){	*((uint *)BCSR1) &= ~BCSR1_PCCEN;	return 0;}#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)static int hardware_disable(int slot){	*((uint *)BCSR1) &= ~BCSR1_PCCEN;	return 0;}#endif	/* CFG_CMD_PCMCIA */#endif	/* (F)ADS *//* -------------------------------------------------------------------- *//* TQM8xxL Boards by TQ Components					*//* SC8xx   Boards by SinoVee Microsystems				*//* -------------------------------------------------------------------- */#if defined(CONFIG_TQM8xxL) || defined(CONFIG_SVM_SC8xx)#if defined(CONFIG_TQM8xxL)#define PCMCIA_BOARD_MSG "TQM8xxL"#endif#if defined(CONFIG_SVM_SC8xx)#define PCMCIA_BOARD_MSG "SC8xx"#endifstatic int hardware_enable(int slot){	volatile immap_t	*immap;	volatile cpm8xx_t	*cp;	volatile pcmconf8xx_t	*pcmp;	volatile sysconf8xx_t	*sysp;	uint reg, mask;	debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);	udelay(10000);	immap = (immap_t *)CFG_IMMR;	sysp  = (sysconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_siu_conf));	pcmp  = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));	cp    = (cpm8xx_t *)(&(((immap_t *)CFG_IMMR)->im_cpm));	/*	 * Configure SIUMCR to enable PCMCIA port B	 * (VFLS[0:1] are not used for debugging, we connect FRZ# instead)	 */	sysp->sc_siumcr &= ~SIUMCR_DBGC11;	/* set DBGC to 00 */	/* clear interrupt state, and disable interrupts */	pcmp->pcmc_pscr =  PCMCIA_MASK(slot);	pcmp->pcmc_per &= ~PCMCIA_MASK(slot);	/*	 * Disable interrupts, DMA, and PCMCIA buffers	 * (isolate the interface) and assert RESET signal	 */	debug ("Disable PCMCIA buffers and assert RESET\n");	reg  = 0;	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */#ifndef NSCU_OE_INV	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */#endif	PCMCIA_PGCRX(slot) = reg;	udelay(500);#ifndef CONFIG_HMI10#ifndef CONFIG_NSCU	/*	 * Configure Port C pins for	 * 5 Volts Enable and 3 Volts enable	 */	immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);	immap->im_ioport.iop_pcso  &= ~(0x0002 | 0x0004);	/* remove all power */	immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);#endif#else	/* CONFIG_HMI10 */	/*	 * Configure Port B  pins for	 * 5 Volts Enable and 3 Volts enable	 */	immap->im_cpm.cp_pbpar &= ~(0x00000300);	/* remove all power */	immap->im_cpm.cp_pbdat |= 0x00000300;#endif	/* CONFIG_HMI10 */	/*	 * Make sure there is a card in the slot, then configure the interface.	 */	udelay(10000);	debug ("[%d] %s: PIPR(%p)=0x%x\n",		__LINE__,__FUNCTION__,		&(pcmp->pcmc_pipr),pcmp->pcmc_pipr);#ifndef CONFIG_HMI10	if (pcmp->pcmc_pipr & (0x18000000 >> (slot << 4))) {#else	if (pcmp->pcmc_pipr & (0x10000000 >> (slot << 4))) {#endif	/* CONFIG_HMI10 */		printf ("   No Card found\n");		return (1);	}	/*	 * Power On.	 */	mask = PCMCIA_VS1(slot) | PCMCIA_VS2(slot);	reg  = pcmp->pcmc_pipr;	debug ("PIPR: 0x%x ==> VS1=o%s, VS2=o%s\n",		reg,		(reg&PCMCIA_VS1(slot))?"n":"ff",		(reg&PCMCIA_VS2(slot))?"n":"ff");#ifndef CONFIG_NSCU	if ((reg & mask) == mask) {#ifndef CONFIG_HMI10		immap->im_ioport.iop_pcdat |= 0x0004;#else		immap->im_cpm.cp_pbdat &= ~(0x0000100);#endif	/* CONFIG_HMI10 */		puts (" 5.0V card found: ");	} else {#ifndef CONFIG_HMI10		immap->im_ioport.iop_pcdat |= 0x0002;#else		immap->im_cpm.cp_pbdat &= ~(0x0000200);#endif	/* CONFIG_HMI10 */		puts (" 3.3V card found: ");	}#ifndef CONFIG_HMI10	immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);#else	immap->im_cpm.cp_pbdir |= 0x00000300;#endif	/* CONFIG_HMI10 */#else	if ((reg & mask) == mask) {		puts (" 5.0V card found: ");	} else {		puts (" 3.3V card found: ");	}#endif#if 0	/*  VCC switch error flag, PCMCIA slot INPACK_ pin */	cp->cp_pbdir &= ~(0x0020 | 0x0010);	cp->cp_pbpar &= ~(0x0020 | 0x0010);	udelay(500000);#endif	udelay(1000);	debug ("Enable PCMCIA buffers and stop RESET\n");	reg  =  PCMCIA_PGCRX(slot);	reg &= ~__MY_PCMCIA_GCRX_CXRESET;	/* active high */#ifndef NSCU_OE_INV	reg &= ~__MY_PCMCIA_GCRX_CXOE;		/* active low  */#else	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */#endif	PCMCIA_PGCRX(slot) = reg;	udelay(250000);	/* some cards need >150 ms to come up :-( */	debug ("# hardware_enable done\n");	return (0);}#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)static int hardware_disable(int slot){	volatile immap_t	*immap;	volatile pcmconf8xx_t	*pcmp;	u_long reg;	debug ("hardware_disable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);	immap = (immap_t *)CFG_IMMR;	pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));#ifndef CONFIG_HMI10#ifndef CONFIG_NSCU	/* remove all power */	immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);#endif#else	/* CONFIG_HMI10 */	immap->im_cpm.cp_pbdat |= 0x00000300;#endif	/* CONFIG_HMI10 */	debug ("Disable PCMCIA buffers and assert RESET\n");	reg  = 0;	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */#ifndef NSCU_OE_INV	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */#endif	PCMCIA_PGCRX(slot) = reg;	udelay(10000);	return (0);}#endif	/* CFG_CMD_PCMCIA */#ifdef CONFIG_NSCUstatic int voltage_set(int slot, int vcc, int vpp){	return 0;}#elsestatic int voltage_set(int slot, int vcc, int vpp){	volatile immap_t	*immap;	volatile pcmconf8xx_t	*pcmp;	u_long reg;	debug ("voltage_set: "		PCMCIA_BOARD_MSG		" Slot %c, Vcc=%d.%d, Vpp=%d.%d\n",		'A'+slot, vcc/10, vcc%10, vpp/10, vcc%10);	immap = (immap_t *)CFG_IMMR;	pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));	/*	 * Disable PCMCIA buffers (isolate the interface)	 * and assert RESET signal	 */	debug ("Disable PCMCIA buffers and assert RESET\n");	reg  = PCMCIA_PGCRX(slot);	reg |= __MY_PCMCIA_GCRX_CXRESET;	/* active high */#ifndef NSCU_OE_INV	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */#else	reg &= ~__MY_PCMCIA_GCRX_CXOE;		/* active low  */#endif	PCMCIA_PGCRX(slot) = reg;	udelay(500);#ifndef CONFIG_HMI10	/*	 * Configure Port C pins for	 * 5 Volts Enable and 3 Volts enable,	 * Turn off all power	 */	debug ("PCMCIA power OFF\n");	immap->im_ioport.iop_pcpar &= ~(0x0002 | 0x0004);	immap->im_ioport.iop_pcso  &= ~(0x0002 | 0x0004);	immap->im_ioport.iop_pcdat &= ~(0x0002 | 0x0004);	reg = 0;	switch(vcc) {	case  0: 		break;	case 33: reg |= 0x0002;	break;	case 50: reg |= 0x0004;	break;	default: 		goto done;	}#else	/* CONFIG_HMI10 */	/*	 * Configure Port B pins for	 * 5 Volts Enable and 3 Volts enable,	 * Turn off all power	 */	debug ("PCMCIA power OFF\n");	immap->im_cpm.cp_pbpar &= ~(0x00000300);	/* remove all power */	immap->im_cpm.cp_pbdat |= 0x00000300;	reg = 0;	switch(vcc) {		case  0:			break;		case 33: reg |= 0x00000200;	break;		case 50: reg |= 0x00000100;	break;		default:			goto done;}#endif	/* CONFIG_HMI10 */	/* Checking supported voltages */	debug ("PIPR: 0x%x --> %s\n",		pcmp->pcmc_pipr,		(pcmp->pcmc_pipr & 0x00008000) ? "only 5 V" : "can do 3.3V");#ifndef CONFIG_HMI10	immap->im_ioport.iop_pcdat |= reg;	immap->im_ioport.iop_pcdir |= (0x0002 | 0x0004);#else	immap->im_cpm.cp_pbdat &= !reg;	immap->im_cpm.cp_pbdir |= 0x00000300;#endif	/* CONFIG_HMI10 */	if (reg) {#ifndef CONFIG_HMI10		debug ("PCMCIA powered at %sV\n",			(reg&0x0004) ? "5.0" : "3.3");#else		debug ("PCMCIA powered at %sV\n",			(reg&0x00000200) ? "5.0" : "3.3");#endif	/* CONFIG_HMI10 */	} else {		debug ("PCMCIA powered down\n");	}done:	debug ("Enable PCMCIA buffers and stop RESET\n");	reg  =  PCMCIA_PGCRX(slot);	reg &= ~__MY_PCMCIA_GCRX_CXRESET;	/* active high */#ifndef NSCU_OE_INV	reg &= ~__MY_PCMCIA_GCRX_CXOE;		/* active low  */#else	reg |= __MY_PCMCIA_GCRX_CXOE;		/* active low  */#endif	PCMCIA_PGCRX(slot) = reg;	udelay(500);	debug ("voltage_set: " PCMCIA_BOARD_MSG " Slot %c, DONE\n",		slot+'A');	return (0);}#endif#endif	/* TQM8xxL *//* -------------------------------------------------------------------- *//* LWMON Board								*//* -------------------------------------------------------------------- */#if defined(CONFIG_LWMON)#define PCMCIA_BOARD_MSG "LWMON"/* #define's for MAX1604 Power Switch */#define MAX1604_OP_SUS		0x80#define MAX1604_VCCBON		0x40#define MAX1604_VCC_35		0x20#define MAX1604_VCCBHIZ		0x10#define MAX1604_VPPBON		0x08#define MAX1604_VPPBPBPGM	0x04#define MAX1604_VPPBHIZ		0x02/* reserved			0x01	*/static int hardware_enable(int slot){	volatile immap_t	*immap;	volatile cpm8xx_t	*cp;	volatile pcmconf8xx_t	*pcmp;	volatile sysconf8xx_t	*sysp;	uint reg, mask;	uchar val;	debug ("hardware_enable: " PCMCIA_BOARD_MSG " Slot %c\n", 'A'+slot);	/* Switch on PCMCIA port in PIC register 0x60 */	reg = pic_read  (0x60);	debug ("[%d] PIC read: reg_60 = 0x%02x\n", __LINE__, reg);	reg &= ~0x10;	/* reg |= 0x08; Vpp not needed */	pic_write (0x60, reg);#ifdef DEBUG	reg = pic_read  (0x60);

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