s3c2400.h

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/*
 * (C) Copyright 2003
 * David M黮ler ELSOFT AG Switzerland. [e-mail]
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/************************************************
 * NAME	    : s3c2400.h
 * Version  : 31.3.2003
 *
 * Based on S3C2400X User's manual Rev 1.1
 ************************************************/

#ifndef __S3C2400_H__
#define __S3C2400_H__

#define S3C24X0_UART_CHANNELS	2
#define S3C24X0_SPI_CHANNELS	1
#define PALETTE			(0x14A00400)	/* SJS */

typedef enum {
	S3C24X0_UART0,
	S3C24X0_UART1,
} S3C24X0_UARTS_NR;

/* S3C2400 device base addresses */
#define S3C24X0_MEMCTL_BASE		0x14000000
#define S3C24X0_USB_HOST_BASE		0x14200000
#define S3C24X0_INTERRUPT_BASE		0x14400000
#define S3C24X0_DMA_BASE		0x14600000
#define S3C24X0_CLOCK_POWER_BASE	0x14800000
#define S3C24X0_LCD_BASE		0x14A00000
#define S3C24X0_UART_BASE		0x15000000
#define S3C24X0_TIMER_BASE		0x15100000
#define S3C24X0_USB_DEVICE_BASE		0x15200140
#define S3C24X0_WATCHDOG_BASE		0x15300000
#define S3C24X0_I2C_BASE		0x15400000
#define S3C24X0_I2S_BASE		0x15508000
#define S3C24X0_GPIO_BASE		0x15600000
#define S3C24X0_RTC_BASE		0x15700000
#define S3C24X0_ADC_BASE		0x15800000
#define S3C24X0_SPI_BASE		0x15900000
#define S3C2400_MMC_BASE		0x15A00000

/* include common stuff */
#include <s3c24x0.h>


static inline S3C24X0_MEMCTL * const S3C24X0_GetBase_MEMCTL(void)
{
	return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE;
}
static inline S3C24X0_USB_HOST * const S3C24X0_GetBase_USB_HOST(void)
{
	return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE;
}
static inline S3C24X0_INTERRUPT * const S3C24X0_GetBase_INTERRUPT(void)
{
	return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE;
}
static inline S3C24X0_DMAS * const S3C24X0_GetBase_DMAS(void)
{
	return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE;
}
static inline S3C24X0_CLOCK_POWER * const S3C24X0_GetBase_CLOCK_POWER(void)
{
	return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE;
}
static inline S3C24X0_LCD * const S3C24X0_GetBase_LCD(void)
{
	return (S3C24X0_LCD * const)S3C24X0_LCD_BASE;
}
static inline S3C24X0_UART * const S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
{
	return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000));
}
static inline S3C24X0_TIMERS * const S3C24X0_GetBase_TIMERS(void)
{
	return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE;
}
static inline S3C24X0_USB_DEVICE * const S3C24X0_GetBase_USB_DEVICE(void)
{
	return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE;
}
static inline S3C24X0_WATCHDOG * const S3C24X0_GetBase_WATCHDOG(void)
{
	return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE;
}
static inline S3C24X0_I2C * const S3C24X0_GetBase_I2C(void)
{
	return (S3C24X0_I2C * const)S3C24X0_I2C_BASE;
}
static inline S3C24X0_I2S * const S3C24X0_GetBase_I2S(void)
{
	return (S3C24X0_I2S * const)S3C24X0_I2S_BASE;
}
static inline S3C24X0_GPIO * const S3C24X0_GetBase_GPIO(void)
{
	return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE;
}
static inline S3C24X0_RTC * const S3C24X0_GetBase_RTC(void)
{
	return (S3C24X0_RTC * const)S3C24X0_RTC_BASE;
}
static inline S3C2400_ADC * const S3C2400_GetBase_ADC(void)
{
	return (S3C2400_ADC * const)S3C24X0_ADC_BASE;
}
static inline S3C24X0_SPI * const S3C24X0_GetBase_SPI(void)
{
	return (S3C24X0_SPI * const)S3C24X0_SPI_BASE;
}
static inline S3C2400_MMC * const S3C2400_GetBase_MMC(void)
{
	return (S3C2400_MMC * const)S3C2400_MMC_BASE;
}

#if 0
/* Memory control */
#define rBWSCON		(*(volatile unsigned *)0x14000000)
#define rBANKCON0	(*(volatile unsigned *)0x14000004)
#define rBANKCON1	(*(volatile unsigned *)0x14000008)
#define rBANKCON2	(*(volatile unsigned *)0x1400000C)
#define rBANKCON3	(*(volatile unsigned *)0x14000010)
#define rBANKCON4	(*(volatile unsigned *)0x14000014)
#define rBANKCON5	(*(volatile unsigned *)0x14000018)
#define rBANKCON6	(*(volatile unsigned *)0x1400001C)
#define rBANKCON7	(*(volatile unsigned *)0x14000020)
#define rREFRESH	(*(volatile unsigned *)0x14000024)
#define rBANKSIZE	(*(volatile unsigned *)0x14000028)
#define rMRSRB6		(*(volatile unsigned *)0x1400002C)
#define rMRSRB7		(*(volatile unsigned *)0x14000030)


/* INTERRUPT */
#define rSRCPND		(*(volatile unsigned *)0x14400000)
#define rINTMOD		(*(volatile unsigned *)0x14400004)
#define rINTMSK		(*(volatile unsigned *)0x14400008)
#define rPRIORITY	(*(volatile unsigned *)0x1440000C)
#define rINTPND		(*(volatile unsigned *)0x14400010)
#define rINTOFFSET	(*(volatile unsigned *)0x14400014)


/* DMA */
#define rDISRC0		(*(volatile unsigned *)0x14600000)
#define rDIDST0		(*(volatile unsigned *)0x14600004)
#define rDCON0		(*(volatile unsigned *)0x14600008)
#define rDSTAT0		(*(volatile unsigned *)0x1460000C)
#define rDCSRC0		(*(volatile unsigned *)0x14600010)
#define rDCDST0		(*(volatile unsigned *)0x14600014)
#define rDMASKTRIG0	(*(volatile unsigned *)0x14600018)
#define rDISRC1		(*(volatile unsigned *)0x14600020)
#define rDIDST1		(*(volatile unsigned *)0x14600024)
#define rDCON1		(*(volatile unsigned *)0x14600028)
#define rDSTAT1		(*(volatile unsigned *)0x1460002C)
#define rDCSRC1		(*(volatile unsigned *)0x14600030)
#define rDCDST1		(*(volatile unsigned *)0x14600034)
#define rDMASKTRIG1	(*(volatile unsigned *)0x14600038)
#define rDISRC2		(*(volatile unsigned *)0x14600040)
#define rDIDST2		(*(volatile unsigned *)0x14600044)
#define rDCON2		(*(volatile unsigned *)0x14600048)
#define rDSTAT2		(*(volatile unsigned *)0x1460004C)
#define rDCSRC2		(*(volatile unsigned *)0x14600050)
#define rDCDST2		(*(volatile unsigned *)0x14600054)
#define rDMASKTRIG2	(*(volatile unsigned *)0x14600058)
#define rDISRC3		(*(volatile unsigned *)0x14600060)
#define rDIDST3		(*(volatile unsigned *)0x14600064)
#define rDCON3		(*(volatile unsigned *)0x14600068)
#define rDSTAT3		(*(volatile unsigned *)0x1460006C)
#define rDCSRC3		(*(volatile unsigned *)0x14600070)
#define rDCDST3		(*(volatile unsigned *)0x14600074)
#define rDMASKTRIG3	(*(volatile unsigned *)0x14600078)


/* CLOCK & POWER MANAGEMENT */
#define rLOCKTIME	(*(volatile unsigned *)0x14800000)
#define rMPLLCON	(*(volatile unsigned *)0x14800004)
#define rUPLLCON	(*(volatile unsigned *)0x14800008)
#define rCLKCON		(*(volatile unsigned *)0x1480000C)
#define rCLKSLOW	(*(volatile unsigned *)0x14800010)
#define rCLKDIVN	(*(volatile unsigned *)0x14800014)


/* LCD CONTROLLER */
#define rLCDCON1	(*(volatile unsigned *)0x14A00000)
#define rLCDCON2	(*(volatile unsigned *)0x14A00004)
#define rLCDCON3	(*(volatile unsigned *)0x14A00008)
#define rLCDCON4	(*(volatile unsigned *)0x14A0000C)
#define rLCDCON5	(*(volatile unsigned *)0x14A00010)
#define rLCDSADDR1	(*(volatile unsigned *)0x14A00014)
#define rLCDSADDR2	(*(volatile unsigned *)0x14A00018)
#define rLCDSADDR3	(*(volatile unsigned *)0x14A0001C)
#define rREDLUT		(*(volatile unsigned *)0x14A00020)
#define rGREENLUT	(*(volatile unsigned *)0x14A00024)
#define rBLUELUT	(*(volatile unsigned *)0x14A00028)
#define rDP1_2		(*(volatile unsigned *)0x14A0002C)
#define rDP4_7		(*(volatile unsigned *)0x14A00030)
#define rDP3_5		(*(volatile unsigned *)0x14A00034)
#define rDP2_3		(*(volatile unsigned *)0x14A00038)
#define rDP5_7		(*(volatile unsigned *)0x14A0003c)
#define rDP3_4		(*(volatile unsigned *)0x14A00040)
#define rDP4_5		(*(volatile unsigned *)0x14A00044)
#define rDP6_7		(*(volatile unsigned *)0x14A00048)
#define rDITHMODE	(*(volatile unsigned *)0x14A0004C)
#define rTPAL		(*(volatile unsigned *)0x14A00050)
#define PALETTE		(0x14A00400)	/* SJS */


/* UART */
#define rULCON0		(*(volatile unsigned char *)0x15000000)
#define rUCON0		(*(volatile unsigned short *)0x15000004)
#define rUFCON0		(*(volatile unsigned char *)0x15000008)
#define rUMCON0		(*(volatile unsigned char *)0x1500000C)
#define rUTRSTAT0	(*(volatile unsigned char *)0x15000010)
#define rUERSTAT0	(*(volatile unsigned char *)0x15000014)
#define rUFSTAT0	(*(volatile unsigned short *)0x15000018)
#define rUMSTAT0	(*(volatile unsigned char *)0x1500001C)
#define rUBRDIV0	(*(volatile unsigned short *)0x15000028)

#define rULCON1		(*(volatile unsigned char *)0x15004000)
#define rUCON1		(*(volatile unsigned short *)0x15004004)
#define rUFCON1		(*(volatile unsigned char *)0x15004008)
#define rUMCON1		(*(volatile unsigned char *)0x1500400C)
#define rUTRSTAT1	(*(volatile unsigned char *)0x15004010)
#define rUERSTAT1	(*(volatile unsigned char *)0x15004014)
#define rUFSTAT1	(*(volatile unsigned short *)0x15004018)
#define rUMSTAT1	(*(volatile unsigned char *)0x1500401C)
#define rUBRDIV1	(*(volatile unsigned short *)0x15004028)

#ifdef __BIG_ENDIAN
#define rUTXH0		(*(volatile unsigned char *)0x15000023)
#define rURXH0		(*(volatile unsigned char *)0x15000027)
#define rUTXH1		(*(volatile unsigned char *)0x15004023)
#define rURXH1		(*(volatile unsigned char *)0x15004027)

#define WrUTXH0(ch)	(*(volatile unsigned char *)0x15000023)=(unsigned char)(ch)
#define RdURXH0()	(*(volatile unsigned char *)0x15000027)
#define WrUTXH1(ch)	(*(volatile unsigned char *)0x15004023)=(unsigned char)(ch)
#define RdURXH1()	(*(volatile unsigned char *)0x15004027)

#define UTXH0		(0x15000020+3)  /* byte_access address by DMA */
#define URXH0		(0x15000024+3)
#define UTXH1		(0x15004020+3)
#define URXH1		(0x15004024+3)

#else /* Little Endian */
#define rUTXH0		(*(volatile unsigned char *)0x15000020)
#define rURXH0		(*(volatile unsigned char *)0x15000024)
#define rUTXH1		(*(volatile unsigned char *)0x15004020)
#define rURXH1		(*(volatile unsigned char *)0x15004024)

#define WrUTXH0(ch)	(*(volatile unsigned char *)0x15000020)=(unsigned char)(ch)
#define RdURXH0()	(*(volatile unsigned char *)0x15000024)
#define WrUTXH1(ch)	(*(volatile unsigned char *)0x15004020)=(unsigned char)(ch)
#define RdURXH1()	(*(volatile unsigned char *)0x15004024)

#define UTXH0		(0x15000020)    /* byte_access address by DMA */
#define URXH0		(0x15000024)
#define UTXH1		(0x15004020)
#define URXH1		(0x15004024)
#endif