smilynxem.c

F:worksip2440a board可启动u-boot-like.tar.gz F:worksip2440a board可启动u-boot-like.tar.gz

	memset (cr, 0, sizeof (cr));
	cr[0x00] = ht - 5;
	cr[0x01] = hd - 1;
	cr[0x02] = hbs - 1;
	cr[0x03] = (hbe & 0x1F);
	cr[0x04] = hs;
	cr[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);

	cr[0x06] = (vt - 2) & 0xFF;
	cr[0x07] = (((vt - 2) & 0x100) >> 8)
		| (((vd - 1) & 0x100) >> 7)
		| ((vs & 0x100) >> 6)
		| (((vbs - 1) & 0x100) >> 5)
		| ((LineCompare & 0x100) >> 4)
		| (((vt - 2) & 0x200) >> 4)
		| (((vd - 1) & 0x200) >> 3)
		| ((vs & 0x200) >> 2);

	cr[0x30] = ((vt - 2) & 0x400) >> 7
		| (((vd - 1) & 0x400) >> 8)
		| (((vbs - 1) & 0x400) >> 9)
		| ((vs & 0x400) >> 10)
		| (interlaced) ? 0x80 : 0;


	cr[0x08] = 0x00;
	cr[0x09] = (dblscan << 7)
		| ((LineCompare & 0x200) >> 3)
		| (((vbs - 1) & 0x200) >> 4)
		| (TextScanLines - 1);

	cr[0x10] = vs & 0xff;	/* VSyncPulseStart */
	cr[0x11] = (ve & 0x0f);
	cr[0x12] = (vd - 1) & 0xff;	/* LineCount  */
	cr[0x13] = wd & 0xff;
	cr[0x14] = 0x40;
	cr[0x15] = (vbs - 1) & 0xff;
	cr[0x16] = vbe & 0xff;
	cr[0x17] = 0xe3;	/* but it does not work */
	cr[0x18] = 0xff & LineCompare;
	cr[0x22] = 0x00;	/* todo? */


	/* now set the registers */
	for (i = 0; i <= 0x18; i++) {	/*CR00 .. CR18 */
		smiWrite (SMI_INDX_D4, i, cr[i]);
	}
	i = 0x22;		/*CR22 */
	smiWrite (SMI_INDX_D4, i, cr[i]);
	i = 0x30;		/*CR30 */
	smiWrite (SMI_INDX_D4, i, cr[i]);
}

/*****************************************************************************/
#define REF_FREQ	14318180
#define PMIN		1
#define PMAX		255
#define QMIN		1
#define QMAX		63

static unsigned int FindPQ (unsigned int freq, unsigned int *pp, unsigned int *pq)
{
	unsigned int n = QMIN, m = 0;
	long long int L = 0, P = freq, Q = REF_FREQ, H = P >> 1;
	long long int D = 0x7ffffffffffffffLL;

	for (n = QMIN; n <= QMAX; n++) {
		m = PMIN;	/* p/q ~ freq/ref -> p*ref-freq*q ~ 0 */
		L = P * n - m * Q;
		while (L > 0 && m < PMAX) {
			L -= REF_FREQ;	/* difference is greater as 0 subtract fref */
			m++;	/* and increment m */
		}
		/* difference is less or equal than 0 or m > maximum */
		if (m > PMAX)
			break;	/* no solution: if we increase n we get the same situation */
		/* L is <= 0 now */
		if (-L > H && m > PMIN) {	/* if difference > the half fref */
			L += REF_FREQ;	/* we take the situation before */
			m--;	/* because its closer to 0 */
		}
		L = (L < 0) ? -L : +L;	/* absolute value */
		if (D < L)	/* if last difference was better take next n */
			continue;
		D = L;
		*pp = m;
		*pq = n;	/*  keep improved data */
		if (D == 0)
			break;	/* best result we can get */
	}
	return (unsigned int) (0xffffffff & D);
}

/*****************************************************************************/
static void smiLoadCcr (struct ctfb_res_modes *var, unsigned short device_id)
{
	unsigned int p, q;
	long long freq;
	register GraphicDevice *pGD  = (GraphicDevice *)&smi;

	smiWrite (SMI_INDX_C4, 0x65, 0);
	smiWrite (SMI_INDX_C4, 0x66, 0);
	smiWrite (SMI_INDX_C4, 0x68, 0x50);
	if (device_id == PCI_DEVICE_ID_SMI_810) {
		smiWrite (SMI_INDX_C4, 0x69, 0x3);
	} else {
		smiWrite (SMI_INDX_C4, 0x69, 0x0);
	}

	/* Memory clock */
	switch (device_id) {
	case PCI_DEVICE_ID_SMI_710 :
		smiWrite (SMI_INDX_C4, 0x6a, 0x75);
		break;
	case PCI_DEVICE_ID_SMI_712 :
		smiWrite (SMI_INDX_C4, 0x6a, 0x80);
		break;
	default :
		smiWrite (SMI_INDX_C4, 0x6a, 0x53);
		break;
	}
	smiWrite (SMI_INDX_C4, 0x6b, 0x15);

	/* VCLK */
	freq = 1000000000000LL / var -> pixclock;

	FindPQ ((unsigned int)freq, &p, &q);

	smiWrite (SMI_INDX_C4, 0x6c, p);
	smiWrite (SMI_INDX_C4, 0x6d, q);

}

/*******************************************************************************
 *
 * Init video chip with common Linux graphic modes (lilo)
 */
void *video_hw_init (void)
{
	GraphicDevice *pGD = (GraphicDevice *)&smi;
	unsigned short device_id;
	pci_dev_t devbusfn;
	int videomode;
	unsigned long t1, hsynch, vsynch;
	unsigned int pci_mem_base, *vm;
	char *penv;
	int tmp, i, bits_per_pixel;
	struct ctfb_res_modes *res_mode;
	struct ctfb_res_modes var_mode;
	unsigned char videoout;

	/* Search for video chip */
	printf("Video: ");

	if ((devbusfn = pci_find_devices(supported, 0)) < 0)
	{
		printf ("Controller not found !\n");
		return (NULL);
	}

	/* PCI setup */
	pci_write_config_dword (devbusfn, PCI_COMMAND, (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
	pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
	pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
	pci_mem_base = pci_mem_to_phys (devbusfn, pci_mem_base);

	tmp = 0;

	videomode = CFG_DEFAULT_VIDEO_MODE;
	/* get video mode via environment */
	if ((penv = getenv ("videomode")) != NULL) {
		/* deceide if it is a string */
		if (penv[0] <= '9') {
			videomode = (int) simple_strtoul (penv, NULL, 16);
			tmp = 1;
		}
	} else {
		tmp = 1;
	}
	if (tmp) {
		/* parameter are vesa modes */
		/* search params */
		for (i = 0; i < VESA_MODES_COUNT; i++) {
			if (vesa_modes[i].vesanr == videomode)
				break;
		}
		if (i == VESA_MODES_COUNT) {
			printf ("no VESA Mode found, switching to mode 0x%x ", CFG_DEFAULT_VIDEO_MODE);
			i = 0;
		}
		res_mode =
			(struct ctfb_res_modes *) &res_mode_init[vesa_modes[i].
								 resindex];
		bits_per_pixel = vesa_modes[i].bits_per_pixel;
	} else {

		res_mode = (struct ctfb_res_modes *) &var_mode;
		bits_per_pixel = video_get_params (res_mode, penv);
	}

	/* calculate hsynch and vsynch freq (info only) */
	t1 = (res_mode->left_margin + res_mode->xres +
	      res_mode->right_margin + res_mode->hsync_len) / 8;
	t1 *= 8;
	t1 *= res_mode->pixclock;
	t1 /= 1000;
	hsynch = 1000000000L / t1;
	t1 *=
		(res_mode->upper_margin + res_mode->yres +
		 res_mode->lower_margin + res_mode->vsync_len);
	t1 /= 1000;
	vsynch = 1000000000L / t1;

	/* fill in Graphic device struct */
	sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", res_mode->xres,
		 res_mode->yres, bits_per_pixel, (hsynch / 1000),
		 (vsynch / 1000));
	printf ("%s\n", pGD->modeIdent);
	pGD->winSizeX = res_mode->xres;
	pGD->winSizeY = res_mode->yres;
	pGD->plnSizeX = res_mode->xres;
	pGD->plnSizeY = res_mode->yres;
	switch (bits_per_pixel) {
	case 8:
		pGD->gdfBytesPP = 1;
		pGD->gdfIndex = GDF__8BIT_INDEX;
		break;
	case 15:
		pGD->gdfBytesPP = 2;
		pGD->gdfIndex = GDF_15BIT_555RGB;
		break;
	case 16:
		pGD->gdfBytesPP = 2;
		pGD->gdfIndex = GDF_16BIT_565RGB;
		break;
	case 24:
		pGD->gdfBytesPP = 3;
		pGD->gdfIndex = GDF_24BIT_888RGB;
		break;
	}

	pGD->isaBase = CFG_ISA_IO;
	pGD->pciBase = pci_mem_base;
	pGD->dprBase = (pci_mem_base + 0x400000 + 0x8000);
	pGD->vprBase = (pci_mem_base + 0x400000 + 0xc000);
	pGD->cprBase = (pci_mem_base + 0x400000 + 0xe000);
	pGD->frameAdrs = pci_mem_base;
	pGD->memSize = VIDEO_MEM_SIZE;

	/* Set up hardware : select color mode,
	   set Register base to isa 3dx for 3?x regs*/
	out8 (SMI_MISC_REG, 0x01);

	/* Turn off display */
	smiWrite (SMI_INDX_C4, 0x01, 0x20);

	/* Unlock ext. crt regs */
	out8 (SMI_LOCK_REG, 0x40);

	/* Unlock crt regs 0-7 */
	smiWrite (SMI_INDX_D4, 0x11, 0x0e);

	/* Sytem Control Register */
	smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, SMI_SCR, sizeof(SMI_SCR));

	/* extented CRT Register */
	smiLoadRegs (SMI_INDX_D4, SMI_DATA_D5, SMI_EXT_CRT, sizeof(SMI_EXT_CRT));

	/* Attributes controller registers */
	smiLoadRegs (SMI_INDX_ATTR, SMI_INDX_ATTR, SMI_ATTR, sizeof(SMI_ATTR));

	/* Graphics Controller Register */
	smiLoadRegs (SMI_INDX_CE, SMI_DATA_CF, SMI_GCR, sizeof(SMI_GCR));

	/* Sequencer Register */
	smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, SMI_SEQR, sizeof(SMI_SEQR));

	/* Power Control Register */
	smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, SMI_PCR, sizeof(SMI_PCR));

	/* Memory Control Register */
	/* Register MSR62 is a power on configurable register. We don't */
	/* modify it */
	smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, SMI_MCR, sizeof(SMI_MCR));

	/* Set misc output register */
	smiLoadMsr (res_mode);

	/* Set CRT and Clock control registers */
	smiLoadCrt (res_mode, bits_per_pixel);

	smiLoadCcr (res_mode, device_id);

	/* Hardware Cusor Register */
	smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, SMI_HCR, sizeof(SMI_HCR));

	/* Enable  Display  */
	videoout = 2;	    /* Default output is CRT */
	if ((penv = getenv ("videoout")) != NULL) {
		/* deceide if it is a string */
		videoout = (int) simple_strtoul (penv, NULL, 16);
	}
	smiWrite (SMI_INDX_C4, 0x31, videoout);

	/* Video processor default setup */
	smiInitVideoProcessor ();

	/* Capture port default setup */
	smiInitCapturePort ();

	/* Drawing engine default setup */
	smiInitDrawingEngine ();

	/* Turn on display */
	smiWrite (0x3c4, 0x01, 0x01);

	/* Clear video memory */
	i = pGD->memSize/4;
	vm = (unsigned int *)pGD->pciBase;
	while(i--)
		*vm++ = 0;
	return ((void*)&smi);
}

/*******************************************************************************
 *
 * Drawing engine fill on screen region
 */
void video_hw_rectfill (
	unsigned int bpp,	      /* bytes per pixel */
	unsigned int dst_x,	      /* dest pos x */
	unsigned int dst_y,	      /* dest pos y */
	unsigned int dim_x,	      /* frame width */
	unsigned int dim_y,	      /* frame height */
	unsigned int color	      /* fill color */
	)
{
	register GraphicDevice *pGD = (GraphicDevice *)&smi;
	register unsigned int control;

	dim_x *= bpp;

	out32r ((pGD->dprBase + 0x0014), color);
	out32r ((pGD->dprBase + 0x0004), ((dst_x<<16) | dst_y));
	out32r ((pGD->dprBase + 0x0008), ((dim_x<<16) | dim_y));

	control = 0x0000ffff &	in32r ((pGD->dprBase + 0x000c));

	control |= 0x80010000;

	out32r ((pGD->dprBase + 0x000c),  control);

	/* Wait for drawing processor */
	do
	{
		out8 ((pGD->isaBase + 0x3c4), 0x16);
	} while (in8 (pGD->isaBase + 0x3c5) & 0x08);
}

/*******************************************************************************
 *
 * Drawing engine bitblt with screen region
 */
void video_hw_bitblt (
	unsigned int bpp,	      /* bytes per pixel */
	unsigned int src_x,	      /* source pos x */
	unsigned int src_y,	      /* source pos y */
	unsigned int dst_x,	      /* dest pos x */
	unsigned int dst_y,	      /* dest pos y */
	unsigned int dim_x,	      /* frame width */
	unsigned int dim_y	      /* frame height */
	)
{
	register GraphicDevice *pGD = (GraphicDevice *)&smi;
	register unsigned int control;

	dim_x *= bpp;

	if ((src_y<dst_y) || ((src_y==dst_y) && (src_x<dst_x)))
	{
		out32r ((pGD->dprBase + 0x0000), (((src_x+dim_x-1)<<16) | (src_y+dim_y-1)));
		out32r ((pGD->dprBase + 0x0004), (((dst_x+dim_x-1)<<16) | (dst_y+dim_y-1)));
		control = 0x88000000;
	} else {
		out32r ((pGD->dprBase + 0x0000), ((src_x<<16) | src_y));
		out32r ((pGD->dprBase + 0x0004), ((dst_x<<16) | dst_y));
		control = 0x80000000;
	}

	out32r ((pGD->dprBase + 0x0008), ((dim_x<<16) | dim_y));
	control |= (0x0000ffff &  in32r ((pGD->dprBase + 0x000c)));
	out32r ((pGD->dprBase + 0x000c), control);

	/* Wait for drawing processor */
	do
	{
		out8 ((pGD->isaBase + 0x3c4), 0x16);
	} while (in8 (pGD->isaBase + 0x3c5) & 0x08);
}

/*******************************************************************************
 *
 * Set a RGB color in the LUT (8 bit index)
 */
void video_set_lut (
	unsigned int index,	      /* color number */
	unsigned char r,	      /* red */
	unsigned char g,	      /* green */
	unsigned char b		      /* blue */
	)
{
	register GraphicDevice *pGD = (GraphicDevice *)&smi;

	out8 (SMI_LUT_MASK,  0xff);

	out8 (SMI_LUT_START, (char)index);

	out8 (SMI_LUT_RGB, r>>2);    /* red */
	udelay (10);
	out8 (SMI_LUT_RGB, g>>2);    /* green */
	udelay (10);
	out8 (SMI_LUT_RGB, b>>2);    /* blue */
	udelay (10);
}

#endif /* CONFIG_VIDEO_SMI_LYNXEM */