maxplus.bat

《数字信号处理的FPGA实现》代码

echo #----------------------------------------------------------------------- 
echo # Altera MaxplusII VHDL compiler script for the book     
echo # Digital Signal Processing with FPGAs  (2. edition)
echo # Author: Dr. Uwe Meyer-Baese            EMAIL: [e-mail]
echo #----------------------------------------------------------------------- 
call veryclean.bat
C:\maxplus10p2\maxplus2.exe -v 

echo Compile chapter 1 entitys: example and fun_text
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate example.vhd
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate fun_text.vhd

echo Compile chapter 2 entitys: add_1p, add_2p, add_3p, mul_ser, and cordic
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate add_1p.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate add_2p.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate add_3p.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate mul_ser.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate cordic.vhd 

echo Compile chapter 3 entitys: fir_srg, dafsm, darom, dasign, and dapara
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate fir_gen.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate fir_srg.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate dafsm.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate darom.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate dasign.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate dapara.vhd 

echo Compile chapter 4 entitys: iir, iir_pipe, and iir_par 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate iir.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate iir_pipe.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate iir_par.vhd  

echo Compile chapter 5 entitys: cic3r32, cic3s32, db4poly, and db4latti 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate cic3r32.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate cic3s32.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate db4poly.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate db4latti.vhd  

echo Compile chapter 6 entitys: rader7, ccmul, and bfproc 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate rader7.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate ccmul.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate bfproc.vhd  

echo Compile chapter 7 entitys: lfsr, lfsr_step3 and ammod 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate lfsr.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate lfsr6s3.vhd 
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate ammod.vhd  

echo Compile 2/e entitys: div_res, div_aegp, fir_lms, and fir6dlms
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate div_res.vhd
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate div_aegp.vhd
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate fir_lms.vhd
C:\maxplus10p2\maxplus2.exe -compile -ta_reg -simulate fir6dlms.vhd