📄 ffti.hif

📁 电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖)
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USR
 constraint(d)
11 downto 0
PARAMETER_STRING
USR
 constraint(q)
7 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|div4limit:Ilimit
cfft1024X12:inst1|cfft:aCfft|div4limit:Qlimit
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
mulfactor
# storage
db|ffti.(38).cnf
db|ffti.(38).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
mulfactor.vhd
782d39337a637f5193930ad9346a131
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
8
PARAMETER_SIGNED_DEC
USR
stage
6
PARAMETER_SIGNED_DEC
USR
 constraint(angle)
11 downto 0
PARAMETER_STRING
USR
 constraint(i)
9 downto 0
PARAMETER_STRING
USR
 constraint(q)
9 downto 0
PARAMETER_STRING
USR
 constraint(iout)
11 downto 0
PARAMETER_STRING
USR
 constraint(qout)
11 downto 0
PARAMETER_STRING
USR
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sc_corproc
# storage
db|ffti.(39).cnf
db|ffti.(39).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
sc_corproc.vhd
164e684493f57be72bdbd46caf1292d
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
8
PARAMETER_SIGNED_DEC
USR
stage
6
PARAMETER_SIGNED_DEC
USR
 constraint(xin)
9 downto 0
PARAMETER_STRING
USR
 constraint(yin)
9 downto 0
PARAMETER_STRING
USR
 constraint(ain)
9 downto 0
PARAMETER_STRING
USR
 constraint(sin)
11 downto 0
PARAMETER_STRING
USR
 constraint(cos)
11 downto 0
PARAMETER_STRING
USR
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_cordic
# storage
db|ffti.(40).cnf
db|ffti.(40).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_cordic.vhd
e588e818627149edf062b1d968c8b63
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
pipeline
14
PARAMETER_SIGNED_DEC
USR
width
16
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(41).cnf
db|ffti.(41).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
0
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:1:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(42).cnf
db|ffti.(42).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
1
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:2:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(43).cnf
db|ffti.(43).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
2
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:3:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(44).cnf
db|ffti.(44).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
3
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:4:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(45).cnf
db|ffti.(45).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
4
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:5:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(46).cnf
db|ffti.(46).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
5
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:6:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(47).cnf
db|ffti.(47).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
6
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:7:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(48).cnf
db|ffti.(48).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
7
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:8:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(49).cnf
db|ffti.(49).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
8
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:9:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(50).cnf
db|ffti.(50).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
9
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:10:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(51).cnf
db|ffti.(51).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
10
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:11:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(52).cnf
db|ffti.(52).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
11
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
PARAMETER_STRING
USR
 constraint(zi)
19 downto 0
PARAMETER_STRING
USR
 constraint(xo)
15 downto 0
PARAMETER_STRING
USR
 constraint(yo)
15 downto 0
PARAMETER_STRING
USR
 constraint(zo)
19 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
cfft1024X12:inst1|cfft:aCfft|mulfactor:amulfactor|sc_corproc:u1|p2r_cordic:u1|p2r_CordicPipe:\gen_pipe:12:Pipe
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
p2r_CordicPipe
# storage
db|ffti.(53).cnf
db|ffti.(53).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
p2r_CordicPipe.vhd
6619d5fa79d97e895521a97112a6a7de
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
width
16
PARAMETER_SIGNED_DEC
USR
pipeid
12
PARAMETER_SIGNED_DEC
USR
 constraint(xi)
15 downto 0
PARAMETER_STRING
USR
 constraint(yi)
15 downto 0
💿 文件大小 7405 K
👤 上传用户 rickie936
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🏷️ 相关标签

#FPGA #电子设计大赛 #源码 #音频信号分析仪
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