simple_beep.prj

基于FPGA的VHDL编程实现各种音频信号

KEY LIBERO "8.0"
KEY CAPTURE "8.0.3.7"
KEY DEFAULT_IMPORT_LOC "C:\Actelprj\core8051\smartgen\RAM256X8"
KEY DEFAULT_OPEN_LOC ""
KEY HDLTechnology "VERILOG"
KEY VendorTechnology_Family "Fusion"
KEY VendorTechnology_Die "IR6X6M2"
KEY VendorTechnology_Package "fg256"
KEY ProjectLocation "F:\Actel_prj\myprj\simple_beep"
KEY SimulationType "VERILOG"
KEY Vendor "Actel"
KEY ActiveRoot "main::work"
LIST REVISIONS
VALUE="Impl1",NUM=1
CURREV=1
ENDLIST
LIST FileManager
VALUE "<project>\designer\impl1\main.adb,adb"
STATE="utd"
ENDFILE
VALUE "<project>\designer\impl1\main.pdb,pdb"
STATE="utd"
ENDFILE
VALUE "<project>\designer\impl1\main.stp,stp"
STATE="utd"
ENDFILE
VALUE "<project>\designer\impl1\main_fp\main.pro,pro"
STATE="utd"
ENDFILE
VALUE "<project>\designer\impl1\music_simple_beep.adb,adb"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\divide_by12.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\key_measure.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\main.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_440HZ.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_ambulance_siren.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_high_speed_pursuit.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_note_A_440HZ.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_parameter.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_parameter.vhd,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_police_siren.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_simple_beep.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\hdl\music_tune.v,hdl"
STATE="utd"
ENDFILE
VALUE "<project>\smartgen\PLL_25M\PLL_25M.cxf,actgen_cxf"
STATE="utd"
ENDFILE
VALUE "<project>\smartgen\PLL_25M\PLL_25M.gen,gen"
STATE="utd"
PARENT="<project>\smartgen\PLL_25M\PLL_25M.cxf"
IS_READONLY="TRUE"
ENDFILE
VALUE "<project>\smartgen\PLL_25M\PLL_25M.log,log"
STATE="utd"
PARENT="<project>\smartgen\PLL_25M\PLL_25M.cxf"
IS_READONLY="TRUE"
ENDFILE
VALUE "<project>\smartgen\PLL_25M\PLL_25M.v,hdl"
STATE="utd"
PARENT="<project>\smartgen\PLL_25M\PLL_25M.cxf"
IS_READONLY="TRUE"
ENDFILE
VALUE "<project>\synthesis\main.edn,syn_edn"
STATE="utd"
ENDFILE
VALUE "<project>\synthesis\main_drc.rpt,log"
STATE="utd"
ENDFILE
VALUE "<project>\synthesis\main_sdc.sdc,syn_sdc"
STATE="utd"
ENDFILE
VALUE "<project>\synthesis\music_simple_beep.edn,syn_edn"
STATE="utd"
ENDFILE
VALUE "<project>\synthesis\music_simple_beep_drc.rpt,log"
STATE="utd"
ENDFILE
VALUE "<project>\synthesis\music_simple_beep_sdc.sdc,syn_sdc"
STATE="utd"
ENDFILE
ENDLIST
LIST UsedFile
ENDLIST
LIST AssociatedStimulus
ENDLIST
LIST Other_Association
ENDLIST
LIST SimulationOptions
UseAutomaticDoFile=true
CompilePackage=true
IncludeWaveDo=false
Type=max
RunTime=1000ns
Resolution=1ps
VsimOpt=
EntityName=testbench
TopInstanceName=<top>_0
DoFileName=
DoFileName2=wave.do
ENDLIST
LIST ModelSimLibPath
UseCustomPath=FALSE
LibraryPath=
ENDLIST
LIST GlobalFlowOptions
GenerateHDLAfterSynthesis=FALSE
GenerateHDLAfterPhySynthesis=FALSE
RunDRCAfterSynthesis=TRUE
UpdateViewDrawIni=TRUE
UpdateModelSimIni=TRUE
NoIOMode=FALSE
GenerateHDLFromSchematic=TRUE
FlashProInputFile=pdb
SmartGenCompileReport=T
ENDLIST
LIST PhySynthesisOptions
ENDLIST
LIST Profiles
Type=CoreConfigurator
Profile=CoreConsole
Tool=CoreConsole v1.3 or later
Location=C:\CoreConsole_v1.3\bin\CoreConsole.exe
AdditionalParameter=
Batch=false
EndProfile
Type=Synthesis
Profile=Synplify
Tool=Synplify
Location=C:\Actel\Libero8.0\Synplify\Synplify_88A1\bin\Synplify.exe
AdditionalParameter=
Batch=false
EndProfile
Type=Simulation
Profile=ModelSim
Tool=ModelSim
Location=C:\Actel\Libero8.0\Model\win32acoem\modelsim.exe
AdditionalParameter=
Batch=false
EndProfile
Type=Stimulus
Profile=WFL
Tool=WFL
Location=C:\Actel\Libero8.0\WFL\bin\syncad.exe
AdditionalParameter=-pwflite
Batch=false
EndProfile
Type=PhySynthesis
Profile=PALACE
Tool=PALACE
Location=palace_actel.exe
AdditionalParameter=
Batch=false
EndProfile
Type=Program
Profile=FlashPro
Tool=FlashPro
Location=C:\Actel\Libero8.0\FlashPro\bin\FlashPro.exe
AdditionalParameter=
Batch=false
EndProfile
ENDLIST
LIST ProjectState5.1
LIST "main::work"
LIST Impl1
LiberoState=Post_Layout
ideSYNTHESIS(<project>\synthesis\main.edn,syn_edn)=StateSuccess
ideDESIGNER(<project>\designer\impl1\main.adb,adb)=StateSuccess
LIST FlowOptions
UsePhySynth=FALSE
UseSynth=TRUE
ENDLIST
Used_File_List
VALUE "<project>\synthesis\main.edn,syn_edn"
VALUE "<project>\synthesis\main_sdc.sdc,syn_sdc"
VALUE "<project>\synthesis\main.v,syn_hdl"
VALUE "<project>\phy_synthesis\main_palace.edn,palace_edn"
VALUE "<project>\phy_synthesis\main_palace.gcf,palace_gcf"
VALUE "<project>\phy_synthesis\main_palace.pdc,palace_pdc"
VALUE "<project>\phy_synthesis\main_palace.sdc,palace_sdc"
VALUE "<project>\phy_synthesis\main_palace.v,palace_hdl"
VALUE "<project>\designer\impl1\main.adb,adb"
VALUE "<project>\designer\impl1\main.prb,prb"
VALUE "<project>\designer\impl1\main.stp,stp"
VALUE "<project>\designer\impl1\main_fp\main.pro,pro"
ENDUsed_File_List
ENDLIST
ENDLIST
LIST "music_simple_beep::work"
LIST Impl1
LiberoState=Post_Synthesis
ideSYNTHESIS(<project>\synthesis\music_simple_beep.edn,syn_edn)=StateSuccess
LIST FlowOptions
UsePhySynth=FALSE
UseSynth=TRUE
ENDLIST
Used_File_List
VALUE "<project>\synthesis\music_simple_beep.edn,syn_edn"
VALUE "<project>\synthesis\music_simple_beep_sdc.sdc,syn_sdc"
VALUE "<project>\synthesis\music_simple_beep.v,syn_hdl"
VALUE "<project>\phy_synthesis\music_simple_beep_palace.edn,palace_edn"
VALUE "<project>\phy_synthesis\music_simple_beep_palace.gcf,palace_gcf"
VALUE "<project>\phy_synthesis\music_simple_beep_palace.pdc,palace_pdc"
VALUE "<project>\phy_synthesis\music_simple_beep_palace.sdc,palace_sdc"
VALUE "<project>\phy_synthesis\music_simple_beep_palace.v,palace_hdl"
VALUE "<project>\designer\impl1\music_simple_beep.adb,adb"
VALUE "<project>\designer\impl1\music_simple_beep.prb,prb"
VALUE "<project>\designer\impl1\music_simple_beep.stp,stp"
VALUE "<project>\designer\impl1\music_simple_beep_fp\music_simple_beep.pro,pro"
ENDUsed_File_List
ENDLIST
ENDLIST
ENDLIST
LIST ExcludePackageForSimulation
ENDLIST
LIST ExcludePackageForSynthesis
ENDLIST
LIST IncludeModuleForSimulation
ENDLIST
LIST UserCustomizedFileList
ENDLIST
LIST OpenedFileList
FILE:<project>\hdl\key_measure.v,hdl
FILE:<project>\hdl\music_police_siren.v,hdl
FILE:<project>\hdl\music_ambulance_siren.v,hdl
FILE:<project>\hdl\music_note_A_440HZ.v,hdl
FILE:<project>\hdl\music_high_speed_pursuit.v,hdl
FILE:<project>\hdl\main.v,hdl
DESIGNFLOW:
ACTIVE_VIEW:6
ENDLIST