statreg.cpp

RISC processor ARM-7 emulator

/*************************************************************************
    Copyright (C) 2002,2003,2004,2005 Wei Qin
    See file COPYING for more information.

    This program is free software; you can redistribute it and/or modify    
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
*************************************************************************/

#include <cstdio>
#include <armemul.h>
#include "statreg.h"

using namespace emulator;

void impl_mrs(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, CPSR);
}

void impl_mrs_r(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, SPSR);
}

#define little (1-WORDS_BIGENDIAN)

#ifdef _MODULARIZE_
static inline void update_CPSR(armulator *emu, UInt32 val, UInt32 mask)
#else
static inline void update_CPSR(UInt32 val, UInt32 mask)
#endif
{
	union {
		UInt32 val;
		UInt8 subs[4];
	} result;

	result.val = CPSR;

	if (IN_PRVLG) {
		if (mask&1)
			result.subs[little?0:3] = val & 0xFF;

		if (mask&2)
			result.subs[little?1:2] = ((val>>8) & 0xFF)<<8;

		if (mask&4)
			result.subs[little?2:1] = ((val>>16) & 0xFF)<<16;
	}

	if (mask&8)
		result.subs[little?3:0] = ((val>>24) & 0xFF)<<24;

	WRITE_CPSR(result.val);
}

#ifdef _MODULARIZE_
static inline void update_SPSR(armulator *emu, UInt32 val, UInt32 mask)
#else
static inline void update_SPSR(UInt32 val, UInt32 mask)
#endif
{
	union {
		UInt32 val;
		UInt8 subs[8];
	} result;

	result.val = SPSR;

	if (HAS_SPSR) {
		if (mask&1)
			result.subs[little?0:3] = val & 0xFF;

		if (mask&2)
			result.subs[little?1:2] = ((val>>8) & 0xFF)<<8;

		if (mask&4)
			result.subs[little?2:1] = ((val>>16) & 0xFF)<<16;

		if (mask&8)
			result.subs[little?3:0] = ((val>>24) & 0xFF)<<24;

		WRITE_SPSR(result.val);
	}
}


void impl_msr_1(IMPL_FORMALS)
{
    UInt32 imm = inst & 0xff;
    UInt32 shift = (inst>>7) & 0x1e;
    UInt32 operand;

	operand = (imm >> shift) | (imm << (32 - shift));
#ifdef _MODULARIZE_
	update_CPSR(emu, operand, RNFLD);
#else
	update_CPSR(operand, RNFLD);
#endif

	EMULATOR_STUB(msr_1,inst);
}

void impl_msr_1r(IMPL_FORMALS)
{
    UInt32 imm = inst & 0xff;
    UInt32 shift = (inst>>7) & 0x1e;
    UInt32 operand;

	operand = (imm >> shift) | (imm << (32 - shift));
#ifdef _MODULARIZE_
	update_SPSR(emu, operand, RNFLD);
#else
	update_SPSR(operand, RNFLD);
#endif

	EMULATOR_STUB(msr_1r,inst);
}

void impl_msr_2(IMPL_FORMALS)
{
    //UInt32 imm = inst & 0xff;
    //UInt32 shift = (inst>>7) & 0x1e;
    UInt32 operand;

	operand = RM;
#ifdef _MODULARIZE_
	update_CPSR(emu, operand, RNFLD);
#else
	update_CPSR(operand, RNFLD);
#endif

	EMULATOR_STUB(msr_2,inst);
}

void impl_msr_2r(IMPL_FORMALS)
{
    //UInt32 imm = inst & 0xff;
    //UInt32 shift = (inst>>7) & 0x1e;
    UInt32 operand;

	operand = RM;
#ifdef _MODULARIZE_
	update_SPSR(emu, operand, RNFLD);
#else
	update_SPSR(operand, RNFLD);
#endif

	EMULATOR_STUB(msr_2r,inst);
}


char *disasm_mrs(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "mrs%s %s, CPSR;\n",
		arm_conditional[COND], arm_regnames[RDFLD]);
	return buf;
}

char *disasm_mrs_r(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "mrs%s %s, SPSR;\n",
		arm_conditional[COND], arm_regnames[RDFLD]);
	return buf;
}

/*0x32*/
char *disasm_msr_1(arm_inst_t inst, arm_addr_t addr, char *buf)
{
    UInt32 operand;
    UInt32 imm = inst & 0xff;
    UInt32 shift = (inst>>7) & 0x1e;
	operand = (imm >> shift) | (imm << (32 - shift));
	buf += sprintf(buf, "msr%s ???? , #%d;\n",
		arm_conditional[COND], operand);
	return buf;
}

/*0x36*/
char *disasm_msr_1r(arm_inst_t inst, arm_addr_t addr, char *buf)
{
    UInt32 operand;
    UInt32 imm = inst & 0xff;
    UInt32 shift = (inst>>7) & 0x1e;
	operand = (imm >> shift) | (imm << (32 - shift));
	buf += sprintf(buf, "msr%s ???? , #%d;\n",
		arm_conditional[COND], operand);
	return buf;
}

/*0x12*/
char *disasm_msr_2(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "msr%s ????? ;\n", arm_conditional[COND]);
	return buf;
}

/*0x16*/
char *disasm_msr_2r(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "msr%s ????? ;\n", arm_conditional[COND]);
	return buf;
}