dpi.cpp

RISC processor ARM-7 emulator

void impl_sub_2s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(RN, shifter_operand2(IMPL_ARGS));
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(sub_2s,inst);
}

void impl_sub_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN - shifter_operand3(IMPL_ARGS));

	EMULATOR_STUB(sub_3,inst);
}

void impl_sub_3s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(RN, shifter_operand3(IMPL_ARGS));
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(sub_3s,inst);
}

/*SBC*/
void impl_sbc_1(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN - shifter_operand1(IMPL_ARGS) - (1-C_FLAG));

	EMULATOR_STUB(sbc_1,inst);
}

void impl_sbc_1s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64_W_CARRY(RN, shifter_operand1(IMPL_ARGS), 1-C_FLAG);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(sbc_1s,inst);
}

void impl_sbc_2(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN - shifter_operand2(IMPL_ARGS) - (1-C_FLAG));

	EMULATOR_STUB(sbc_2,inst);
}

void impl_sbc_2s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64_W_CARRY(RN, shifter_operand2(IMPL_ARGS), 1-C_FLAG);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(sbc_2s,inst);
}

void impl_sbc_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN - shifter_operand3(IMPL_ARGS) - (1-C_FLAG));

	EMULATOR_STUB(sbc_3,inst);
}

void impl_sbc_3s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64_W_CARRY(RN, shifter_operand3(IMPL_ARGS), 1-C_FLAG);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(sbc_3s,inst);
}

/*RSB*/

void impl_rsb_1(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, shifter_operand1(IMPL_ARGS) - RN);

	EMULATOR_STUB(rsb_1,inst);
}

void impl_rsb_1s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(shifter_operand1(IMPL_ARGS), RN);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(rsb_1s,inst);
}

void impl_rsb_2(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, shifter_operand2(IMPL_ARGS) - RN);

	EMULATOR_STUB(rsb_2,inst);
}

void impl_rsb_2s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(shifter_operand2(IMPL_ARGS), RN);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(rsb_2s,inst);
}

void impl_rsb_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN - shifter_operand3(IMPL_ARGS));

	EMULATOR_STUB(rsb_3,inst);
}

void impl_rsb_3s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(shifter_operand3(IMPL_ARGS), RN);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(rsb_3s,inst);
}

/*RSC*/
void impl_rsc_1(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, shifter_operand1(IMPL_ARGS) - RN - (1-C_FLAG));

	EMULATOR_STUB(rsc_1,inst);
}

void impl_rsc_1s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64_W_CARRY(shifter_operand1(IMPL_ARGS), RN, 1-C_FLAG);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(rsc_1s,inst);
}

void impl_rsc_2(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, shifter_operand2(IMPL_ARGS) - RN - (1-C_FLAG));

	EMULATOR_STUB(rsc_2,inst);
}

void impl_rsc_2s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64_W_CARRY(shifter_operand2(IMPL_ARGS), RN, 1-C_FLAG);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(rsc_2s,inst);
}

void impl_rsc_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, shifter_operand3(IMPL_ARGS) - RN - (1-C_FLAG));

	EMULATOR_STUB(rsc_3,inst);
}

void impl_rsc_3s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64_W_CARRY(shifter_operand3(IMPL_ARGS), RN, 1-C_FLAG);
	WRITE_REG(RDFLD, (UInt32)result);

	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else
		SET_SUB_FLAGS(result);

	EMULATOR_STUB(rsc_3s,inst);
}

/*AND*/
void impl_and_1(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & shifter_operand1(IMPL_ARGS));

	EMULATOR_STUB(and_1,inst);
}

void impl_and_1s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & shifter_operand1_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(and_1s,inst);
}

void impl_and_2(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & shifter_operand2(IMPL_ARGS));

	EMULATOR_STUB(and_2,inst);
}

void impl_and_2s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & shifter_operand2_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(and_2s,inst);
}

void impl_and_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & shifter_operand3(IMPL_ARGS));

	EMULATOR_STUB(and_3,inst);
}

void impl_and_3s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & shifter_operand3_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(and_3s,inst);
}

/*EOR*/
void impl_eor_1(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN ^ shifter_operand1(IMPL_ARGS));

	EMULATOR_STUB(eor_1,inst);
}

void impl_eor_1s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN ^ shifter_operand1_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(eor_1s,inst);
}

void impl_eor_2(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN ^ shifter_operand2(IMPL_ARGS));

	EMULATOR_STUB(eor_2,inst);
}

void impl_eor_2s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN ^ shifter_operand2_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(eor_2s,inst);
}

void impl_eor_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN ^ shifter_operand3(IMPL_ARGS));

	EMULATOR_STUB(eor_3,inst);
}

void impl_eor_3s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN ^ shifter_operand3_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(eor_3s,inst);
}

/*ORR*/
void impl_orr_1(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN | shifter_operand1(IMPL_ARGS));

	EMULATOR_STUB(orr_1,inst);
}

void impl_orr_1s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN | shifter_operand1_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(orr_1s,inst);
}

void impl_orr_2(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN | shifter_operand2(IMPL_ARGS));

	EMULATOR_STUB(orr_2,inst);
}

void impl_orr_2s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN | shifter_operand2_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(orr_2s,inst);
}

void impl_orr_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN | shifter_operand3(IMPL_ARGS));

	EMULATOR_STUB(orr_3,inst);
}

void impl_orr_3s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN | shifter_operand3_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(orr_3s,inst);
}

/*BIC*/
void impl_bic_1(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & ~shifter_operand1(IMPL_ARGS));

	EMULATOR_STUB(bic_1,inst);
}

void impl_bic_1s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & ~shifter_operand1_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(bic_1s,inst);
}

void impl_bic_2(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & ~shifter_operand2(IMPL_ARGS));

	EMULATOR_STUB(bic_2,inst);
}

void impl_bic_2s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & ~shifter_operand2_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(bic_2s,inst);
}

void impl_bic_3(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & ~shifter_operand3(IMPL_ARGS));

	EMULATOR_STUB(bic_3,inst);
}

void impl_bic_3s(IMPL_FORMALS)
{
	WRITE_REG(RDFLD, RN & ~shifter_operand3_s(IMPL_ARGS));
	if (RDFLD==15)
		WRITE_CPSR(SPSR);
	else 
		SET_MOVE_FLAGS(RD);

	EMULATOR_STUB(bic_3s,inst);
}

/*CMP*/
void impl_cmp_1s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(RN, shifter_operand1(IMPL_ARGS));
	SET_SUB_FLAGS(result);

	EMULATOR_STUB(cmp_1s,inst);
}

void impl_cmp_2s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(RN, shifter_operand2(IMPL_ARGS));
	SET_SUB_FLAGS(result);

	EMULATOR_STUB(cmp_2s,inst);
}

void impl_cmp_3s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_SUB64(RN, shifter_operand3(IMPL_ARGS));
	SET_SUB_FLAGS(result);

	EMULATOR_STUB(cmp_3s,inst);
}

/*CMN*/
void impl_cmn_1s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_ADD64(RN, shifter_operand1(IMPL_ARGS));
	SET_ADD_FLAGS(result);

	EMULATOR_STUB(cmn_1s,inst);
}

void impl_cmn_2s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_ADD64(RN, shifter_operand2(IMPL_ARGS));
	SET_ADD_FLAGS(result);

	EMULATOR_STUB(cmn_2s,inst);
}

void impl_cmn_3s(IMPL_FORMALS)
{
	UInt64 result;
	result = IMPL_ADD64(RN, shifter_operand3(IMPL_ARGS));
	SET_ADD_FLAGS(result);

	EMULATOR_STUB(cmn_3s,inst);
}

/*TST*/
void impl_tst_1s(IMPL_FORMALS)
{
	UInt32 result;
	result = RN & shifter_operand1_s(IMPL_ARGS);
	SET_MOVE_FLAGS(result);

	EMULATOR_STUB(tst_1s,inst);
}

void impl_tst_2s(IMPL_FORMALS)
{
	UInt32 result;
	result = RN & shifter_operand2_s(IMPL_ARGS);
	SET_MOVE_FLAGS(result);

	EMULATOR_STUB(tst_2s,inst);
}

void impl_tst_3s(IMPL_FORMALS)
{
	UInt32 result;
	result = RN & shifter_operand3_s(IMPL_ARGS);
	SET_MOVE_FLAGS(result);

	EMULATOR_STUB(tst_3s,inst);
}

/*TEQ*/
void impl_teq_1s(IMPL_FORMALS)
{
	UInt32 result;
	result = RN ^ shifter_operand1_s(IMPL_ARGS);
	SET_MOVE_FLAGS(result);

	EMULATOR_STUB(teq_1s,inst);
}

void impl_teq_2s(IMPL_FORMALS)
{
	UInt32 result;
	result = RN ^ shifter_operand2_s(IMPL_ARGS);
	SET_MOVE_FLAGS(result);

	EMULATOR_STUB(teq_2s,inst);
}

void impl_teq_3s(IMPL_FORMALS)
{
	UInt32 result;
	result = RN ^ shifter_operand3_s(IMPL_ARGS);
	SET_MOVE_FLAGS(result);

	EMULATOR_STUB(teq_3s,inst);
}

static UInt32 disasm_shifter_operand1(arm_inst_t inst, char *buf)
{
	UInt32 imm = inst & 0xff;
	UInt32 shift = (inst>>7) & 0x1e;
	UInt32 result;

	result = rotate_right(imm, shift);
	return sprintf(buf, "#%d", result);
}

static UInt32 disasm_shifter_operand2(arm_inst_t inst, char *buf)
{
	UInt32 shift_imm = (inst>>7) & 0x01f;
	UInt8 type = (inst>>5) & 0x03;

	if (shift_imm==0 && type==3)
		return sprintf(buf, "%s, rrx", arm_regnames[RMFLD]);
	else if (shift_imm==0 && type==0)
		return sprintf(buf, "%s", arm_regnames[RMFLD]);
	else
		return sprintf(buf, "%s, %s #%d",
			arm_regnames[RMFLD], arm_shift[type], shift_imm);
}

static UInt32 disasm_shifter_operand3(arm_inst_t inst, char *buf)
{
	UInt8 type = (inst>>5) & 0x03;

	return sprintf(buf, "%s, %s %s",
		arm_regnames[RMFLD], arm_shift[type], arm_regnames[RSFLD]);
}

char *disasm_unop_1(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s%s %s, ",
		arm_dpinames[DOPC], arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD]);
	buf += disasm_shifter_operand1(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
} 

char *disasm_unop_2(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s%s %s, ",
		arm_dpinames[DOPC], arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD]);
	buf += disasm_shifter_operand2(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}

char *disasm_unop_3(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s%s %s, ",
		arm_dpinames[DOPC], arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD]);
	buf += disasm_shifter_operand3(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}

char *disasm_binop_1(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s%s %s, %s, ",
		arm_dpinames[DOPC], arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD], arm_regnames[RNFLD]);
	buf += disasm_shifter_operand1(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}

char *disasm_binop_2(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s%s %s, %s, ",
		arm_dpinames[DOPC], arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD], arm_regnames[RNFLD]);
	buf += disasm_shifter_operand2(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}

char *disasm_binop_3(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s%s %s, %s, ",
		arm_dpinames[DOPC], arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD], arm_regnames[RNFLD]);
	buf += disasm_shifter_operand3(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}

char *disasm_tst_1(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s %s, ",
		arm_dpinames[DOPC], arm_conditional[COND],
		arm_regnames[RNFLD]);
	buf += disasm_shifter_operand1(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}

char *disasm_tst_2(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s %s, ",
		arm_dpinames[DOPC], arm_conditional[COND],
		arm_regnames[RNFLD]);
	buf += disasm_shifter_operand2(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}

char *disasm_tst_3(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "%s%s %s, ",
		arm_dpinames[DOPC], arm_conditional[COND],
		arm_regnames[RNFLD]);
	buf += disasm_shifter_operand3(inst, buf);
	buf += sprintf(buf, ";\n");
	return buf;
}