mult.cpp

RISC processor ARM-7 emulator

/*************************************************************************
    Copyright (C) 2002,2003,2004,2005 Wei Qin
    See file COPYING for more information.

    This program is free software; you can redistribute it and/or modify    
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
*************************************************************************/

#include <cstdio>
#include <armemul.h>
#include "mult.h"

using namespace emulator;

/*RN and RD is switched for MLA*/
void impl_mla(IMPL_FORMALS)
{
	WRITE_REG(RNFLD, (UInt32)((UInt64)RM * (UInt64)RS + RD));

	EMULATOR_STUB(mla,inst);
}

void impl_mla_s(IMPL_FORMALS)
{
	WRITE_REG(RNFLD, (UInt32)((UInt64)RM * (UInt64)RS + RD));
    ASGN_N(BIT31(RN));
    ASGN_Z(RN==0);

	EMULATOR_STUB(mla_s,inst);
}

/*RN is RD actually for MUL*/
void impl_mul(IMPL_FORMALS)
{
	WRITE_REG(RNFLD, (UInt32)((UInt64)RM * (UInt64)RS));

	EMULATOR_STUB(mul,inst);
}

void impl_mul_s(IMPL_FORMALS)
{
	WRITE_REG(RNFLD, (UInt32)((UInt64)RM * (UInt64)RS));
    ASGN_N(BIT31(RN));
    ASGN_Z(RN==0);

	EMULATOR_STUB(mul_s,inst);
}

/*RN for high, RD for low*/
void impl_smull(IMPL_FORMALS)
{
	UInt64 val = (SInt64)RM * (SInt64)RS;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);

	EMULATOR_STUB(smull,inst);
}

void impl_smull_s(IMPL_FORMALS)
{
	UInt64 val = (SInt64)RM * (SInt64)RS;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);
    ASGN_N(BIT31(RN));
    ASGN_Z(val==0);

	EMULATOR_STUB(smull_s,inst);
}

/*RN for high, RD for low*/
void impl_smlal(IMPL_FORMALS)
{
	SInt64 acc = ((UInt64)RN<<32) + (UInt64)RD;
	UInt64 val = (SInt64)RM * (SInt64)RS + acc;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);

	EMULATOR_STUB(smlal,inst);
}

void impl_smlal_s(IMPL_FORMALS)
{
	SInt64 acc = ((UInt64)RN<<32) + (UInt64)RD;
	UInt64 val = (SInt64)RM * (SInt64)RS + acc;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);
    ASGN_N(BIT31(RN));
    ASGN_Z(val==0);

	EMULATOR_STUB(smlal_s,inst);
}

void impl_umull(IMPL_FORMALS)
{
	UInt64 val = (UInt64)RM * (UInt64)RS;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);

	EMULATOR_STUB(umull,inst);
}

void impl_umull_s(IMPL_FORMALS)
{
	UInt64 val = (UInt64)RM * (UInt64)RS;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);
    ASGN_N(BIT31(RN));
    ASGN_Z(val==0);

	EMULATOR_STUB(umull_s,inst);
}

void impl_umlal(IMPL_FORMALS)
{
	UInt64 acc = ((UInt64)RN<<32) + (UInt64)RD;
	UInt64 val = (UInt64)RM * (UInt64)RS + acc;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);

	EMULATOR_STUB(umlal,inst);
}

void impl_umlal_s(IMPL_FORMALS)
{
	UInt64 acc = ((UInt64)RN<<32) + (UInt64)RD;
	UInt64 val = (UInt64)RM * (UInt64)RS + acc;
	WRITE_REG(RNFLD, (UInt32)(val>>32));
	WRITE_REG(RDFLD, (UInt32)val);
    ASGN_N(BIT31(RN));
    ASGN_Z(val==0);

	EMULATOR_STUB(umlal_s,inst);
}


char *disasm_mla(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "mla%s%s %s, %s, %s, %s;\n",
		arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RNFLD], arm_regnames[RMFLD],
		arm_regnames[RSFLD], arm_regnames[RDFLD]); 
	return buf;
}

char *disasm_mul(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "mul%s%s %s, %s, %s;\n",
		arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RNFLD], arm_regnames[RMFLD], arm_regnames[RSFLD]); 
	return buf;
}

char *disasm_smull(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "smull%s%s %s, %s, %s, %s;\n",
		arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD], arm_regnames[RNFLD],
		arm_regnames[RMFLD], arm_regnames[RSFLD]); 
	return buf;
}

char *disasm_smlal(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "smlal%s%s %s, %s, %s, %s;\n",
		arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD], arm_regnames[RNFLD],
		arm_regnames[RMFLD], arm_regnames[RSFLD]); 
	return buf;
}

char *disasm_umull(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "umull%s%s %s, %s, %s, %s;\n",
		arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD], arm_regnames[RNFLD],
		arm_regnames[RMFLD], arm_regnames[RSFLD]); 
	return buf;
}

char *disasm_umlal(arm_inst_t inst, arm_addr_t addr, char *buf)
{
	buf += sprintf(buf, "umlal%s%s %s, %s, %s, %s;\n",
		arm_conditional[COND], SFLD?"s":"",
		arm_regnames[RDFLD], arm_regnames[RNFLD],
		arm_regnames[RMFLD], arm_regnames[RSFLD]); 
	return buf;
}