armemul.h

RISC processor ARM-7 emulator

/*************************************************************************
    Copyright (C) 2002,2003,2004,2005 Wei Qin
    See file COPYING for more information.

    This program is free software; you can redistribute it and/or modify    
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
*************************************************************************/

#ifndef __ARMEMUL_H__
#define __ARMEMUL_H__

#include <cstdio>
#include <misc.h> // search follows the path of -I's
#include "emumem.h"


namespace emulator {

  class memory;
  class device_master;

#define DEF_CLASS(a,b) a,
	typedef enum {
#include "inst_class.h"
	} inst_class;

  class arm_emulator {

	public:

		/* constructor */
		arm_emulator(bool, bool);

		/* destructor */
		~arm_emulator();

		/* run the program */
		UInt64 run_count(UInt64 count);

		/* stop running */
		void stop() {running = false;}

		/* is running? */
		bool is_running() {return running;}

		/* set running */
		void set_running() {running = true;}

		/* execute one instruction */
		void execute(arm_inst_t inst, word_t addr);

		/* debug an application */
		void debug();

		/* stop running */
		void stop_debug() {debuging = false;}

		/* is debuging */
		bool is_debugging() {return debuging;}

		/* stats output */
		void dump_instruction_counters(FILE *);

		/* stats initialization */
		void reset_instruction_counters();

		/* increment counter */
		void increment_counter(inst_class c) {counters[c]++;}

		word_t get_pc() {return my_regs.gpr[PC_REAL_IND];}

		word_t read_gpr(int index) {
			return my_regs.gpr[index];	
		}

		void write_gpr(int index, word_t val) {
			my_regs.gpr[index==15?PC_REAL_IND:index] = val;
		}

		void write_gpr2(int index, word_t val) {
			my_regs.gpr[index] = val;
		}

		word_t read_cpsr() {return my_regs.cpsr&0xfffffff | (my_regs.cc&0xf)<<28;}
		word_t read_spsr() {return my_regs.spsr;}
		word_t read_cc() {return my_regs.cc;}

		void write_cpsr(word_t val) {my_regs.cpsr=val; my_regs.cc=(val>>28)&0xf;}
		void write_spsr(word_t val) {my_regs.spsr=val;}
		void write_cc(word_t val) {my_regs.cc=val;}

		/* fetch an instruction */
		word_t fetch_inst(arm_addr_t addr) {
			return mem->read_word_fast(addr);
		}

		/* set brk point for syscall emulation */
		void set_brk(arm_addr_t addr) {brk_point = addr;}
		void set_mmap_brk(arm_addr_t addr) {mmap_brk_point = addr;}

		void load_program(const char *, int argc, char *argv[], char *env[]);
		void load_fpe(const char *);

		/* counters */
		UInt64 get_icount() {return icount;}
		UInt64 get_ncount() {return ncount;}

		/* reset */
		void reset();
	private:

		/* number of instructions */
		UInt64 icount;

		/* number of nullified instructions */
		UInt64 ncount;
		
		/* number of executed instructions in each class */
		UInt64 counters[INST_TOTAL];

		/* initialize registers */
		void init_registers();

		/* debug routines */
		void debug_trace(int count);
		void debug_go_to(arm_addr_t addr);
		void debug_dump_registers(FILE *stream);
		void debug_disasm(FILE *stream, arm_addr_t addr);
		void debug_dump(FILE *stream, arm_addr_t addr);

		bool running;
		bool debuging;

	public:
		/* registers */
		struct regs_t {
			word_t gpr[NUM_GPR];
			word_t cpsr;
			word_t spsr;
			word_t cc;
		} my_regs;

		/* memory */
		memory *mem;

		bool verbose;
		bool emulate_syscall;
		target_addr_t brk_point;
		target_addr_t mmap_brk_point;

		/* emulating fpe */
		bool in_fpe;

		/* dpi carries */
		word_t shifter_carry;
		word_t alu_carry;

		device_master *dev_master;
  };
} /* namespace */

#endif