📄 dc550_interrupt.s43
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JNZ int1r ; if( (txcounter % 8) == 0) {
MOV #0,numWinSamples ; clear window variables
MOV #0,winIdx
MOV #0,sin_win_sum
MOV #0,cosin_win_sum ; // repeat bit is between 13ms
CMP #0068h,interrupt_txcounter; // and 14ms
JL int1E4 ; if( 13ms have elapsed ) { //RL
MOV #10,interrupt_modemstate ; modemstate = F;
BIT.B #01h,interrupt_txmsgerror ; // Reverse logic below
JNZ int1E1 ; if ((txmsgerror & 0x01)==0)
MOV #PERIOD_HF,interrupt_timerb_period
JMP int1r ; timerb_period = PERIOD_HF;
int1E1: MOV #PERIOD_8K,interrupt_timerb_period
XOR.B #01h,interrupt_txparityak ; else{timerb_period=PERIOD_8K;
JMP int1r ; txparityak ^= 0x01; }
int1E4: ; else {
RLA interrupt_txbuffer ; put next bit in carrier register
JC int1E9 ; if(carrier reg == 0) //RL
MOV #PERIOD_HF,interrupt_timerb_period
JMP int1r ; timerb_period = PERIOD_HF;
int1E9: MOV #PERIOD_8K,interrupt_timerb_period
XOR.B #01h,interrupt_txparityak; else { timerb_period = PERIOD_8K;
JMP int1r ; txparityak ^= 0x01; }
; Interrupt 1, State D (Acknowledging receipt of bits)
int1D: CMP #008Ch,interrupt_rxcounter;
JNE int1r ; if(rxcounter != 0x008C) break;
MOV #PERIOD_HF,interrupt_timerb_period
JMP int1r ; timerb_period = PERIOD_HF; break;
; Interrupt 1, State C (Receiving Bits)
; The transmit side doesn't really do anything here
; timerb_period should be PERIOD_HF
; int1C: JMP int1r
; Interrupt 1, State B (Verifying a detected carrier)
; The transmit side doesn't really do anything here
; timerb_period should be PERIOD_HF
; int1B: JMP int1r
; Interrupt 1, State A (Hunting for carrier)
; timerb_period should be PERIOD_HF
int1A: CMP #0,interrupt_rtcounter
JNE int1r
CMP.B #0,&interrupt_txready ;
JEQ int1r ; if(interrupt_txready==0) break;
; else {
MOV #8,interrupt_modemstate ; modemstate = E;
MOV #0,numWinSamples ; clear window variables
MOV #0,winIdx
MOV #0,sin_win_sum
MOV #0,cosin_win_sum
MOV interrupt_txmessage,interrupt_txbuffer
MOV #0,interrupt_txcounter ; txcounter = 0;
RLA interrupt_txbuffer ; txbuffer = txmessage
JC int1A2 ; if(!MSB(txbuffer)) { //RL
MOV #PERIOD_HF,interrupt_timerb_period
MOV.B #1,interrupt_txparityak ; timerb_period = PERIOD_HF;
JMP int1r ; txparityak = 1; }
int1A2: MOV #PERIOD_8K,interrupt_timerb_period
; else { timerb_period = PERIOD_8K
MOV.B #0,interrupt_txparityak ; txparityak = 0; }
JMP int1r ; break; }
int1r: ; 34 KHz receive code
MOV &ADC12MEM0,sine_sum
; Increment to State 2
MOV #4,&interrupt_state
RETI
;******************************************************************************
;* INTERRUPT_STATE_2
;******************************************************************************
;* Interrupt State 2 executes the LED wink and flash code and updates the LED
;* control latches.
;******************************************************************************
INTERRUPT_STATE_2
ADD led_switch,pc
JMP itmr12
JMP itmr08
JMP itmr04
;-------------------------------------------------------------------
; Check LED blink counters
; Unrolled this Loop because:
; - we can avoid save/restore of registers
; - executes faster this way
;-------------------------------------------------------------------
CLR.W &led_switch
TST.W ledBlinkData+0 ; does a counter exist?
JZ itmr01
DEC.W ledBlinkData+0 ; yes, decrement it
JNZ itmr01 ; did it go to zero?
XOR.B #0x01,ledState ; yes, toggle the LED and reset ctr
MOV.W ledBlinkData+2,ledBlinkData+0
itmr01: TST.W ledBlinkData+4 ; check LED1
JZ itmr02
DEC.W ledBlinkData+4
JNZ itmr02
XOR.B #0x02,ledState
MOV.W ledBlinkData+6,ledBlinkData+4
itmr02: TST.W ledBlinkData+8 ; check LED2
JZ itmr03
DEC.W ledBlinkData+8
JNZ itmr03
XOR.B #0x04,ledState
MOV.W ledBlinkData+10,ledBlinkData+8
itmr03: TST.W ledBlinkData+12 ; check LED3
JZ itmr_led_done
DEC.W ledBlinkData+12
JNZ itmr_led_done
XOR.B #0x08,ledState
MOV.W ledBlinkData+14,ledBlinkData+12
JMP itmr_led_done
itmr04: INCD.W &led_switch
TST.W ledBlinkData+16 ; check LED4
JZ itmr05
DEC.W ledBlinkData+16
JNZ itmr05
XOR.B #0x10,ledState
MOV.W ledBlinkData+18,ledBlinkData+16
itmr05: TST.W ledBlinkData+20 ; check LED5
JZ itmr06
DEC.W ledBlinkData+20
JNZ itmr06
XOR.B #0x20,ledState
MOV.W ledBlinkData+22,ledBlinkData+20
itmr06: TST.W ledBlinkData+24 ; check LED6
JZ itmr07
DEC.W ledBlinkData+24
JNZ itmr07
XOR.B #0x40,ledState
MOV.W ledBlinkData+26,ledBlinkData+24
itmr07: TST.W ledBlinkData+28 ; check LED7
JZ itmr_led_done
DEC.W ledBlinkData+28
JNZ itmr_led_done
XOR.B #0x80,ledState
MOV.W ledBlinkData+30,ledBlinkData+28
JMP itmr_led_done
itmr08: INCD.W &led_switch
TST.W ledBlinkData+32 ; check LED8
JZ itmr09
DEC.W ledBlinkData+32
JNZ itmr09
XOR.B #0x01,ledState+1
MOV.W ledBlinkData+34,ledBlinkData+32
itmr09: TST.W ledBlinkData+36 ; check LED9
JZ itmr10
DEC.W ledBlinkData+36
JNZ itmr10
XOR.B #0x02,ledState+1
MOV.W ledBlinkData+38,ledBlinkData+36
itmr10: TST.W ledBlinkData+40 ; check LED10
JZ itmr11
DEC.W ledBlinkData+40
JNZ itmr11
XOR.B #0x04,ledState+1
MOV.W ledBlinkData+42,ledBlinkData+40
itmr11: TST.W ledBlinkData+44 ; check LED11
JZ itmr_led_done
DEC.W ledBlinkData+44
JNZ itmr_led_done
XOR.B #0x08,ledState+1
MOV.W ledBlinkData+46,ledBlinkData+44
JMP itmr_led_done
itmr12: INCD.W &led_switch
TST.W ledBlinkData+48 ; check LED12
JZ itmr13
DEC.W ledBlinkData+48
JNZ itmr13
XOR.B #0x10,ledState+1
MOV.W ledBlinkData+50,ledBlinkData+48
itmr13: TST.W ledBlinkData+52 ; check LED13
JZ itmr14
DEC.W ledBlinkData+52
JNZ itmr14
XOR.B #0x20,ledState+1
MOV.W ledBlinkData+54,ledBlinkData+52
itmr14: TST.W ledBlinkData+56 ; check LED14
JZ itmr15
DEC.W ledBlinkData+56
JNZ itmr15
XOR.B #0x40,ledState+1
MOV.W ledBlinkData+58,ledBlinkData+56
itmr15: TST.W ledBlinkData+60 ; check LED15
JZ itmr_led_done
DEC.W ledBlinkData+60
JNZ itmr_led_done
XOR.B #0x80,ledState+1
MOV.W ledBlinkData+62,ledBlinkData+60
itmr_led_done:
BIT.B #01h,&display_usingbus ; check if display driver is active
JNZ int2r ; if it is, skip LED code
MOV.B ledState,&LEDDATA_OUT ; update LEDs 0..7
BIC.B #LED07CLK,&LEDCTRL_OUT
BIS.B #LED07CLK,&LEDCTRL_OUT
MOV.B ledState+1,&LEDDATA_OUT ; update LEDs 8..15
BIC.B #LED815CLK,&LEDCTRL_OUT
BIS.B #LED815CLK,&LEDCTRL_OUT
;-------------------------------------------------------------------
;-------------------------------------------------------------------
int2r: ; 34 KHz receive code
SUB &ADC12MEM0,cosine_sum
; Increment to State 3
MOV #6,&interrupt_state
RETI
;******************************************************************************
;* INTERRUPT_STATE_3
;******************************************************************************
;* Interrupt State 3 increments the interrupt_counter. It also updates the
;* buzzer counter if necessary.
;******************************************************************************
INTERRUPT_STATE_3
; interrupt_counter code
ADD #1,interrupt_counter ; interrupt_counter++
CMP #0,interrupt_buzzercounter
JEQ int3r ; if(buzzercounter!=0) { //RL
DEC interrupt_buzzercounter; buzzercounter--;
JNZ int3r ; if(buzzercounter==0) //RL
XOR.B #04h,&BUZZER_OUT ; Toggle P6.2 }
MOV #INTERRUPT_BUZZERFREQUENCY,interrupt_buzzercounter
; 34 KHz receive code
int3r: SUB &ADC12MEM0,sine_sum
; Increment to State 4
MOV #8,&interrupt_state
RETI
;******************************************************************************
;* interrupt_timer_handler
;******************************************************************************
;* The interrupt timer handler must be placed in the middle of the interrupt
;* code to accomodate limitations in the Program Counter.
;******************************************************************************
interrupt_timer_handler:
ADD interrupt_state,pc
JMP INTERRUPT_STATE_0
JMP INTERRUPT_STATE_1
JMP INTERRUPT_STATE_2
JMP INTERRUPT_STATE_3
JMP INTERRUPT_STATE_4
;******************************************************************************
;* INTERRUPT_STATE_4
;******************************************************************************
;* Interrupt State 4 runs the modem receive code.
;******************************************************************************
; Interrupt 4, State L (Vegetating for a fixed amount of time)
; This state doesn't really do anything, but after it's over, the four window
; variables should have been cleared. Also, timerb should be PERIOD_HF
; int 4L: JMP int4r
; Interrupt 4, State K (Verifying a detected carrier, transmit disabled)
; This state has been disabled
; Interrupt 4, State J (Hunting for carrier, transmit disabled)
; This state has been mode obsolete
; Interrupt 4, State I (Receiving acknowledgement)
int4I: CMP #0084h,interrupt_txcounter // Reverse logic
JL int4I4 ; if(txcounter > 16.5ms) {
CMP #0090h,interrupt_txcounter
JGE int4r ; if(txcounter >= 18ms) return;
ADD_SAMPLE_WINFULL ; add sample to window
CALC_SQUARES ; calculate pythagorean into R4
CMP interrupt_agcthreshold,R4; if( R4 < interrupt_agcthreshold)
JL int4r ; return;
INC.B interrupt_txparityak ; else { interrupt_parityak++;
JMP int4r ; return; }
int4I4: ; else {
ADD_SAMPLE ; add sin/cos samples to the
; window of eight
JMP int4r ; return; }
; Interrupt 4, State H (Transmitting parity bit)
; The receive side does nothing when the modem is transmitting the parity bit
; JMP int42
; Interrupt 4, State G (Transmitting collision bit)
; The receive side does nothing when the modem is transmitting a collision bit
; JMP int42
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