nflash.h

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#ifndef __NAND_FLASH_H__
#define __NAND_FLASH_H__

typedef struct
{
	unsigned short device_ID ;
	unsigned char  prg_addr  ;	// 0=3 cycle   1=4 cycle
	unsigned short block_size ;
}flash_chip ;


#define	__DELAY()\
	__asm("nop");\
	__asm("nop");\
	__asm("nop");\
	__asm("nop");\
	__asm("nop")

#define NFLASH_BASE_ADDR	(0xb0000000)

#define NFLASH_FRAME_SIZE	512
//#define NFLASH_FRAMES_OF_BLOCK	16
//#define NFLASH_FRAMES_OF_BLOCK	32	/* over 8 Mbytes */
#define NAND_FLASH_BLOCK_SIZE	(512*NFLASH_FRAMES_OF_BLOCK)

#define MAX_PHYSICAL_BLOCKS	8192	/* Reserved for 128M */
#define MAX_LOGICAL_BLOCKS	8000

#define NFLASH_DATA_READ	(*(unsigned char*)( NFLASH_BASE_ADDR + 1))
#define NFLASH_DATA_WRITE	(*(unsigned char*)( NFLASH_BASE_ADDR + 1))
#define NFLASH_CLE   		(*(unsigned char*)( NFLASH_BASE_ADDR + 1))
#define NFLASH_ALE   		(*(unsigned char*)( NFLASH_BASE_ADDR + 1))


#define NFLASH_DEVICE	0xbfbf0010
#define _READYpoint		0xbfbf00a0
#define _CEpoint()		0xbfbf00a3

#define NFLASH_ENB_CE		*(unsigned char *)(_CEpoint()) &= 0xfe
#define NFLASH_DIS_CE		*(unsigned char	*)(_CEpoint()) |= 0x01
#define NFLASH_CLE_HIGH		*(unsigned char *)(_CEpoint()) |= 0x04
#define NFLASH_CLE_LOW		*(unsigned char *)(_CEpoint()) &= 0xfb
#define NFLASH_ALE_HIGH		*(unsigned char *)(_CEpoint()) |= 0x02
#define NFLASH_ALE_LOW		*(unsigned char *)(_CEpoint()) &= 0xfd

/* Arti do not have write protect control pin */
#define _WaitREADY()		while( ! ((*(unsigned int *)_READYpoint())&0x08) )



#define NFLASH_READ0		0x00
#define NFLASH_READ1		0x01
#define NFLASH_READ2		0x50//thhuang, 2002/1/8

#define NFLASH_RESET		0xff
#define NFLASH_FRAME_PROGRAM0	0x80
#define NFLASH_FRAME_PROGRAM1	0x10
#define NFLASH_BLOCK_ERASE0	0x60
#define NFLASH_BLOCK_ERASE1	0xD0
#define NFLASH_STATUS_READ	0x70
#define NFLASH_READ_ID		0x90

#define NFLASH_PROGRAM_SUCCESS	0x01
#define NFLASH_READY		0x40
#define NFLASH_NOT_PROTECTED	0x80

#define NFLASH_OK 1  //Sean Fri 06-21-2002
#define NFLASH_FAIL 0  //Sean Fri 06-21-2002

#endif