system.gui

本系统由服务器软件控制平台和fpga硬件处理系统组成

guiSettings=FILTER=2;ADDR_FLAT_VIEW=true;ADDR_FLAT_VIEW_HEADER=Name,Net,Direction,Range,Class,Sensitivity,Description,Frequency,Reset Polarity,IP Type,IP Version,IP Classification,Bus Connection,Mastership,Bus Standard,Address,Base Address,High Address,Size,Lock,ICache,DCache,Instance,Parent;ADDR_FLAT_VIEW_HEADER_MAP=22,0,15,16,17,18,19,20,21,12,13,14,1,2,4,5,3,7,8,9,10,11,6,23;ADDR_SORT_SECTION=0;ADDR_SORT_ORDER=1;ADDR_FLAT_VIEW_HIDDEN_SECTION=13,14,1,2,4,5,3,7,8,11,6,23;ADDR_FLAT_VERTICAL_SCROLL=0;ADDR_FLAT_HORIZONTAL_SCROLL=0;BUS_FLAT_VIEW=false;BUS_TREE_VIEW_HEADER=Name,Net,Direction,Range,Class,Sensitivity,Description,Frequency,Reset Polarity,IP Type,IP Version,IP Classification,Bus Connection,Mastership,Bus Standard,Address,Base Address,High Address,Size,Lock,ICache,DCache;BUS_TREE_VIEW_HEADER_MAP=0,15,16,17,18,19,20,21,12,13,14,1,2,4,5,3,7,8,9,10,11,6;BUS_TREE_VIEW_HIDDEN_SECTION=15,16,17,18,19,20,21,13,14,1,2,4,5,3,7,8,11,6;BUS_EXPANDED_NODE=reset_block,PS2_Ports_IO_ADAPTER;BUS_TREE_VERTICAL_SCROLL=0;BUS_TREE_HORIZONTAL_SCROLL=0;PORT_FLAT_VIEW=false;PORT_TREE_VIEW_HEADER=Name,Net,Direction,Range,Class,Sensitivity,Description,Frequency,Reset Polarity,IP Type,IP Version,IP Classification,Bus Connection,Mastership,Bus Standard,Address,Base Address,High Address,Size,Lock,ICache,DCache;PORT_TREE_VIEW_HEADER_MAP=0,15,16,17,18,19,20,21,12,13,14,1,2,4,5,3,7,8,9,10,11,6;PORT_TREE_VIEW_HIDDEN_SECTION=15,16,17,18,19,20,21,12,13,14,11,6;PORT_EXPANDED_NODE=;PORT_TREE_VERTICAL_SCROLL=0;PORT_TREE_HORIZONTAL_SCROLL=0;