system_stub.v

来自「本系统由服务器软件控制平台和fpga硬件处理系统组成」· Verilog 代码 · 共 90 行

//-----------------------------------------------------------------------------
// system_stub.v
//-----------------------------------------------------------------------------

module system_stub
  (
    fpga_0_RS232_Uart_1_RX_pin,
    fpga_0_RS232_Uart_1_TX_pin,
    fpga_0_LEDs_4Bit_GPIO_IO_pin,
    fpga_0_DIPSWs_4Bit_GPIO_IO_pin,
    fpga_0_PushButtons_5Bit_GPIO_IO_pin,
    fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_clk_pin,
    fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_data_pin,
    fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_clk_pin,
    fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_data_pin,
    fpga_0_net_gnd_pin,
    fpga_0_net_gnd_1_pin,
    fpga_0_net_gnd_2_pin,
    fpga_0_net_gnd_3_pin,
    fpga_0_net_gnd_4_pin,
    fpga_0_net_gnd_5_pin,
    fpga_0_net_gnd_6_pin,
    sys_clk_pin,
    sys_rst_pin,
    myfirewall_0_ppc_ce_n_conf_pin,
    myfirewall_0_ppc_we_n_conf_pin,
    myfirewall_0_ppc_re_n_conf_pin,
    myfirewall_0_ppc_clr_n_conf_pin,
    myfirewall_0_ppc_addr_conf_pin,
    myfirewall_0_ppc_wdat_conf_pin,
    myfirewall_0_conf_rdat_ppc_pin
  );
  input fpga_0_RS232_Uart_1_RX_pin;
  output fpga_0_RS232_Uart_1_TX_pin;
  inout [0:3] fpga_0_LEDs_4Bit_GPIO_IO_pin;
  inout [0:3] fpga_0_DIPSWs_4Bit_GPIO_IO_pin;
  inout [0:4] fpga_0_PushButtons_5Bit_GPIO_IO_pin;
  inout fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_clk_pin;
  inout fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_data_pin;
  inout fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_clk_pin;
  inout fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_data_pin;
  output fpga_0_net_gnd_pin;
  output fpga_0_net_gnd_1_pin;
  output fpga_0_net_gnd_2_pin;
  output fpga_0_net_gnd_3_pin;
  output fpga_0_net_gnd_4_pin;
  output fpga_0_net_gnd_5_pin;
  output fpga_0_net_gnd_6_pin;
  input sys_clk_pin;
  input sys_rst_pin;
  output myfirewall_0_ppc_ce_n_conf_pin;
  output myfirewall_0_ppc_we_n_conf_pin;
  output myfirewall_0_ppc_re_n_conf_pin;
  output myfirewall_0_ppc_clr_n_conf_pin;
  output [0:7] myfirewall_0_ppc_addr_conf_pin;
  output [0:15] myfirewall_0_ppc_wdat_conf_pin;
  input [0:15] myfirewall_0_conf_rdat_ppc_pin;

  system
    system_i (
      .fpga_0_RS232_Uart_1_RX_pin ( fpga_0_RS232_Uart_1_RX_pin ),
      .fpga_0_RS232_Uart_1_TX_pin ( fpga_0_RS232_Uart_1_TX_pin ),
      .fpga_0_LEDs_4Bit_GPIO_IO_pin ( fpga_0_LEDs_4Bit_GPIO_IO_pin ),
      .fpga_0_DIPSWs_4Bit_GPIO_IO_pin ( fpga_0_DIPSWs_4Bit_GPIO_IO_pin ),
      .fpga_0_PushButtons_5Bit_GPIO_IO_pin ( fpga_0_PushButtons_5Bit_GPIO_IO_pin ),
      .fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_clk_pin ( fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_clk_pin ),
      .fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_data_pin ( fpga_0_PS2_Ports_IO_ADAPTER_ps2_mouse_data_pin ),
      .fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_clk_pin ( fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_clk_pin ),
      .fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_data_pin ( fpga_0_PS2_Ports_IO_ADAPTER_ps2_keyb_data_pin ),
      .fpga_0_net_gnd_pin ( fpga_0_net_gnd_pin ),
      .fpga_0_net_gnd_1_pin ( fpga_0_net_gnd_1_pin ),
      .fpga_0_net_gnd_2_pin ( fpga_0_net_gnd_2_pin ),
      .fpga_0_net_gnd_3_pin ( fpga_0_net_gnd_3_pin ),
      .fpga_0_net_gnd_4_pin ( fpga_0_net_gnd_4_pin ),
      .fpga_0_net_gnd_5_pin ( fpga_0_net_gnd_5_pin ),
      .fpga_0_net_gnd_6_pin ( fpga_0_net_gnd_6_pin ),
      .sys_clk_pin ( sys_clk_pin ),
      .sys_rst_pin ( sys_rst_pin ),
      .myfirewall_0_ppc_ce_n_conf_pin ( myfirewall_0_ppc_ce_n_conf_pin ),
      .myfirewall_0_ppc_we_n_conf_pin ( myfirewall_0_ppc_we_n_conf_pin ),
      .myfirewall_0_ppc_re_n_conf_pin ( myfirewall_0_ppc_re_n_conf_pin ),
      .myfirewall_0_ppc_clr_n_conf_pin ( myfirewall_0_ppc_clr_n_conf_pin ),
      .myfirewall_0_ppc_addr_conf_pin ( myfirewall_0_ppc_addr_conf_pin ),
      .myfirewall_0_ppc_wdat_conf_pin ( myfirewall_0_ppc_wdat_conf_pin ),
      .myfirewall_0_conf_rdat_ppc_pin ( myfirewall_0_conf_rdat_ppc_pin )
    );

endmodule