ps2_ports_wrapper_xst.prj

来自「本系统由服务器软件控制平台和fpga硬件处理系统组成」· PRJ 代码 · 共 7 行

VERILOG opb_ps2_dual_ref_v1_00_a C:\V2P_CD\V2P_CD\lib\lib_rev_1_1\lib\XilinxProcessorIP\pcores\opb_ps2_dual_ref_v1_00_a/hdl/verilog/ps2_sie.v
VERILOG opb_ps2_dual_ref_v1_00_a C:\V2P_CD\V2P_CD\lib\lib_rev_1_1\lib\XilinxProcessorIP\pcores\opb_ps2_dual_ref_v1_00_a/hdl/verilog/ps2_reg.v
VERILOG opb_ps2_dual_ref_v1_00_a C:\V2P_CD\V2P_CD\lib\lib_rev_1_1\lib\XilinxProcessorIP\pcores\opb_ps2_dual_ref_v1_00_a/hdl/verilog/ps2.v
VERILOG opb_ps2_dual_ref_v1_00_a C:\V2P_CD\V2P_CD\lib\lib_rev_1_1\lib\XilinxProcessorIP\pcores\opb_ps2_dual_ref_v1_00_a/hdl/verilog/opb_ipif_slv_ps2_reg_dual.v
VERILOG opb_ps2_dual_ref_v1_00_a C:\V2P_CD\V2P_CD\lib\lib_rev_1_1\lib\XilinxProcessorIP\pcores\opb_ps2_dual_ref_v1_00_a/hdl/verilog/opb_ps2_dual_ref.v
verilog work ../hdl/ps2_ports_wrapper.v