system.twr

本系统由服务器软件控制平台和fpga硬件处理系统组成

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Release 8.2.02i Trace 
Copyright (c) 1995-2006 Xilinx, Inc.  All rights reserved.

trce -e 3 -xml system.twx system.ncd system.pcf

Design file:              system.ncd
Physical constraint file: system.pcf
Device,speed:             xc2vp30,-7 (PRODUCTION 1.92 2006-08-18)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
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INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths 
   option. All paths that are not constrained will be reported in the 
   unconstrained paths section(s) of the report.

================================================================================
Timing constraint: TS_sys_clk_pin = PERIOD TIMEGRP "sys_clk_pin" 10 ns HIGH 50%;

 0 items analyzed, 0 timing errors detected.
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================================================================================
Timing constraint: PATH "TS_RST1_path" TIG;

 3 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
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================================================================================
Timing constraint: TS_dcm_0_dcm_0_CLK0_BUF = PERIOD TIMEGRP "dcm_0_dcm_0_CLK0_BUF" TS_sys_clk_pin
        HIGH 50%;

 36677 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors)
 Minimum period is   9.721ns.
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All constraints were met.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Clock to Setup on destination clock sys_clk_pin
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
sys_clk_pin    |    9.721|    1.354|    1.163|         |
---------------+---------+---------+---------+---------+


Timing summary:
---------------

Timing errors: 0  Score: 0

Constraints cover 36680 paths, 0 nets, and 10475 connections

Design statistics:
   Minimum period:   9.721ns   (Maximum frequency: 102.870MHz)


Analysis completed Mon Mar 31 08:35:03 2008
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Trace Settings:
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Trace Settings 

Peak Memory Usage: 203 MB